platforms/kcu105: set internal vref on ddr4 banks

diff --git a/litex/boards/platforms/kcu105.py b/litex/boards/platforms/kcu105.py
index 13e96b7ba976b690a739ec8fae7c1eaa3f60e16a..53a6dd6de3d72f47a55517d45799ac61dd8dee88 100644 (file)
--- a/litex/boards/platforms/kcu105.py
+++ b/litex/boards/platforms/kcu105.py
@@ -483,3 +483,9 @@ class Platform(XilinxPlatform):
 
     def create_programmer(self):
         return VivadoProgrammer()
+
+    def do_finalize(self, fragment):
+        XilinxPlatform.do_finalize(self, fragment)
+        self.add_platform_command("set_property INTERNAL_VREF {{0.60}} [get_iobanks 44]")
+        self.add_platform_command("set_property INTERNAL_VREF {{0.60}} [get_iobanks 45]")
+        self.add_platform_command("set_property INTERNAL_VREF {{0.60}} [get_iobanks 46]")