(no commit message)

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index ae41ea98c5b759fd0236109c14267b6e6a8a61bc..62328fd5bc11b3e57a142c57fa3ade616d01f75e 100644 (file)
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -270,3 +270,8 @@ It should be clear that this instruction uses bits of the integer
 predicate to decide whether to set CR Fields to `(mask & ~mode)`
 or to zero.  Thus, in effect, it is the integer predicate that has
 been copied into the CR Fields.
+
+By using twin predication, zeroing, and inversion (sm=~r3, dm=r10) for example, it becomes possible to combine two Integers together in
+order to set bits in CR Fields.
+Likewise there are dozens of ways that CR Predicates can be used, on the
+same sv.mtcrweird instruction.