whitespace
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 29 Jul 2022 11:33:18 +0000 (12:33 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 29 Jul 2022 11:33:18 +0000 (12:33 +0100)
openpower/sv/comparison_table.mdwn

index 36c45f367ab7e8d640f1e48fcd913a1af2f34aae..77e5a3c8c887ba30df1ad967219f1db15ea6bc14 100644 (file)
@@ -49,5 +49,7 @@
 [^31]: [RVV intrinsics listing](https://raw.githubusercontent.com/riscv-non-isa/rvv-intrinsic-doc/master/intrinsic_funcs.md) page is 25,000 lines long.
 [^32]: Unknown. estimated to be of the order of length of RVV due to also being a Cray-style Scalable ISA, NEC maintains an [LLVM hard fork](https://github.com/sx-aurora-dev)
 [^33]: [Scalable Matrix Optional Extension](https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/scalable-matrix-extension-armv9-a-architecture)
-    the key is an outer-product instruction [SMOPA](https://developer.arm.com/documentation/ddi0602/2022-06/SME-Instructions/SMOPA--Signed-integer-sum-of-outer-products-and-accumulate-?lang=en) which is very hard to tell at a glance if it is power-2 or non-power-2
+    the key is an outer-product instruction
+    [SMOPA](https://developer.arm.com/documentation/ddi0602/2022-06/SME-Instructions/SMOPA--Signed-integer-sum-of-outer-products-and-accumulate-?lang=en)
+    which is very hard to tell at a glance if it is power-2 or non-power-2
 [^34]: [Advanced matrix Extensions](https://en.wikipedia.org/wiki/Advanced_Matrix_Extensions) supports BF16 and INT8 only. Separate regfile, power-of-two "tiles". Not general-purpose at all.