Properly store 128-bit constant in large model

When converting TI store with CONST_INT to V1TI store with CONST_VECTOR
in large model, an extra instruction may be needed to load CONST_VECTOR
into a register.  Insert the extra instruction to the right place.

gcc/

	PR target/79498
	* config/i386/i386.c (timode_scalar_chain::convert_insn): Insert
	the extra instruction to the right place to store 128-bit constant
	when needed.

gcc/testsuite/

	PR target/79498
	* gcc.target/i386/pr79498.c: New test.

From-SVN: r245438

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3d0e95e29d2d29ec43f20c443674ec32a2303d83..2a4c2c44d307312e50b4643297a46c367f7a93cf 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2017-02-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/79498
+       * config/i386/i386.c (timode_scalar_chain::convert_insn): Insert
+       the extra instruction to the right place to store 128-bit constant
+       when needed.
+
 2017-02-14  Martin Sebor  <msebor@redhat.com>
 
        PR middle-end/79448

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d9a4a38b90072820a0085c5a7befbf261d3304a9..daa230315d0d8dd8fb70b26efb6d8bd07332696d 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3956,8 +3956,13 @@ timode_scalar_chain::convert_insn (rtx_insn *insn)
          /* Since there are no instructions to store 128-bit constant,
             temporary register usage is required.  */
          rtx tmp = gen_reg_rtx (V1TImode);
+         start_sequence ();
          src = gen_rtx_CONST_VECTOR (V1TImode, gen_rtvec (1, src));
          src = validize_mem (force_const_mem (V1TImode, src));
+         rtx_insn *seq = get_insns ();
+         end_sequence ();
+         if (seq)
+           emit_insn_before (seq, insn);
          emit_conversion_insns (gen_rtx_SET (dst, tmp), insn);
          dst = tmp;
        }

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6e42393e9954d6de2e43baa2031af9e32b93e801..071f38fb56515fffe0c242c7f1083dd645858763 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-02-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/79498
+       * gcc.target/i386/pr79498.c: New test.
+
 2017-02-14  Martin Sebor  <msebor@redhat.com>
 
        PR middle-end/79448

diff --git a/gcc/testsuite/gcc.target/i386/pr79498.c b/gcc/testsuite/gcc.target/i386/pr79498.c
new file mode 100644 (file)
index 0000000..8f62393
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr79498.c
@@ -0,0 +1,20 @@
+/* PR target/79498 */
+/* { dg-do compile { target lp64 } } */
+/* { dg-options "-O2 -mno-avx512f -mcmodel=large -Wno-psabi" } */
+
+typedef unsigned U __attribute__ ((vector_size (64)));
+typedef unsigned __int128 V __attribute__ ((vector_size (64)));
+
+static inline V
+bar (U u, U x, V v)
+{
+  v = (V)(U) { 0, ~0 };
+  v[x[0]] <<= u[-63];
+  return v;
+}
+
+V
+foo (U u)
+{
+  return bar (u, (U) {}, (V) {});
+}