@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h
@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = $(bpf_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = $(bpf_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = cr16/libsim.a
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_20 = cr16/run
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_21 = cr16/simops.h
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_18 = cr16/libsim.a
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = cr16/run
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_20 = cr16/simops.h
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_21 = cr16/gencode
@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = $(cr16_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/gencode
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = $(cr16_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_25 = cris/libsim.a
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_26 = cris/run
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = cris/rvdummy
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = \
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_23 = cris/libsim.a
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_24 = cris/run
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_25 = cris/rvdummy
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_26 = \
@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \
@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = $(cris_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = $(cris_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_31 = d10v/libsim.a
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_32 = d10v/run
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_33 = d10v/simops.h
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_34 = $(d10v_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/gencode
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = $(d10v_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_erc32_TRUE@am__append_37 = erc32/libsim.a
-@SIM_ENABLE_ARCH_erc32_TRUE@am__append_38 = erc32/run erc32/sis
-@SIM_ENABLE_ARCH_erc32_TRUE@am__append_39 = sim-%D-install-exec-local
-@SIM_ENABLE_ARCH_erc32_TRUE@am__append_40 = sim-erc32-uninstall-local
-@SIM_ENABLE_ARCH_examples_TRUE@am__append_41 = example-synacor/libsim.a
-@SIM_ENABLE_ARCH_examples_TRUE@am__append_42 = example-synacor/run
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_43 = frv/libsim.a
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_44 = frv/run
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_45 = frv/eng.h
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_46 = $(frv_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = $(frv_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ft32_TRUE@am__append_48 = ft32/libsim.a
-@SIM_ENABLE_ARCH_ft32_TRUE@am__append_49 = ft32/run
-@SIM_ENABLE_ARCH_h8300_TRUE@am__append_50 = h8300/libsim.a
-@SIM_ENABLE_ARCH_h8300_TRUE@am__append_51 = h8300/run
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_52 = iq2000/libsim.a
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_53 = iq2000/run
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_54 = iq2000/eng.h
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_55 = $(iq2000_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = $(iq2000_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_57 = lm32/libsim.a
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_58 = lm32/run
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_59 = lm32/eng.h
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_60 = $(lm32_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = $(lm32_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_62 = m32c/libsim.a
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_63 = m32c/run
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_64 = $(m32c_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_65 = m32c/opc2c
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_66 = \
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = $(cris_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_28 = d10v/libsim.a
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_29 = d10v/run
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_30 = d10v/simops.h
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_31 = d10v/gencode
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_32 = $(d10v_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_erc32_TRUE@am__append_33 = erc32/libsim.a
+@SIM_ENABLE_ARCH_erc32_TRUE@am__append_34 = erc32/run erc32/sis
+@SIM_ENABLE_ARCH_erc32_TRUE@am__append_35 = sim-%D-install-exec-local
+@SIM_ENABLE_ARCH_erc32_TRUE@am__append_36 = sim-erc32-uninstall-local
+@SIM_ENABLE_ARCH_examples_TRUE@am__append_37 = example-synacor/libsim.a
+@SIM_ENABLE_ARCH_examples_TRUE@am__append_38 = example-synacor/run
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_39 = frv/libsim.a
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_40 = frv/run
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_41 = frv/eng.h
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_42 = $(frv_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ft32_TRUE@am__append_43 = ft32/libsim.a
+@SIM_ENABLE_ARCH_ft32_TRUE@am__append_44 = ft32/run
+@SIM_ENABLE_ARCH_h8300_TRUE@am__append_45 = h8300/libsim.a
+@SIM_ENABLE_ARCH_h8300_TRUE@am__append_46 = h8300/run
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = iq2000/libsim.a
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_48 = iq2000/run
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_49 = iq2000/eng.h
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_50 = $(iq2000_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = lm32/libsim.a
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_52 = lm32/run
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_53 = lm32/eng.h
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_54 = $(lm32_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = m32c/libsim.a
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_56 = m32c/run
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_57 = m32c/opc2c
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_58 = \
@SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \
@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_67 = m32r/libsim.a
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_68 = m32r/run
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_69 = \
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = m32r/libsim.a
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_60 = m32r/run
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_61 = \
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_70 = $(m32r_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m32r_TRUE@am__append_71 = $(m32r_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_72 = m68hc11/libsim.a
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_73 = m68hc11/run
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_74 = $(m68hc11_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_75 = m68hc11/gencode
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_76 = $(m68hc11_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mcore_TRUE@am__append_77 = mcore/libsim.a
-@SIM_ENABLE_ARCH_mcore_TRUE@am__append_78 = mcore/run
-@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_79 = microblaze/libsim.a
-@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_80 = microblaze/run
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_81 = \
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_62 = $(m32r_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63 = m68hc11/libsim.a
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_64 = m68hc11/run
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_65 = m68hc11/gencode
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66 = $(m68hc11_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mcore_TRUE@am__append_67 = mcore/libsim.a
+@SIM_ENABLE_ARCH_mcore_TRUE@am__append_68 = mcore/run
+@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_69 = microblaze/libsim.a
+@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_70 = microblaze/run
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_71 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/support.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/itable.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/semantics.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/engine.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/irun.o
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_82 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_72 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_83 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_73 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_OBJ) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_84 = mips/libsim.a
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_85 = mips/run
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_86 = mips/itable.h \
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_74 = mips/libsim.a
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_75 = mips/run
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_76 = mips/itable.h \
@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC)
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_87 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_77 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_88 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_78 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
-@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_89 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_79 = \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_90 = $(mips_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = $(mips_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = mips/multi-include.h mips/multi-run.c
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_93 = mn10300/libsim.a
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_94 = mn10300/run
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95 = \
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_80 = $(mips_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_81 = mips/multi-include.h mips/multi-run.c
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = mn10300/libsim.a
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_83 = mn10300/run
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_84 = \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_moxie_TRUE@am__append_98 = moxie/libsim.a
-@SIM_ENABLE_ARCH_moxie_TRUE@am__append_99 = moxie/run
-@SIM_ENABLE_ARCH_msp430_TRUE@am__append_100 = msp430/libsim.a
-@SIM_ENABLE_ARCH_msp430_TRUE@am__append_101 = msp430/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_102 = or1k/libsim.a
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_103 = or1k/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_104 = or1k/eng.h
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_105 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_106 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ppc_TRUE@am__append_107 = ppc/run ppc/psim
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_108 = pru/libsim.a
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_109 = pru/run
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_110 = riscv/libsim.a
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_111 = riscv/run
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_112 = rl78/libsim.a
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_113 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_114 = rx/libsim.a
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_115 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_116 = sh/libsim.a
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_117 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_118 = \
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_85 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_moxie_TRUE@am__append_86 = moxie/libsim.a
+@SIM_ENABLE_ARCH_moxie_TRUE@am__append_87 = moxie/run
+@SIM_ENABLE_ARCH_msp430_TRUE@am__append_88 = msp430/libsim.a
+@SIM_ENABLE_ARCH_msp430_TRUE@am__append_89 = msp430/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = or1k/libsim.a
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_91 = or1k/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_92 = or1k/eng.h
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_93 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ppc_TRUE@am__append_94 = ppc/run ppc/psim
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_95 = pru/libsim.a
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_96 = pru/run
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_97 = riscv/libsim.a
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_98 = riscv/run
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_99 = rl78/libsim.a
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_100 = rl78/run
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_101 = rx/libsim.a
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_102 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_103 = sh/libsim.a
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_104 = sh/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_105 = \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_119 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_120 = sh/gencode
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_121 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_122 = v850/libsim.a
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_123 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_124 = \
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_106 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_107 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_108 = v850/libsim.a
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_109 = v850/run
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_110 = \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_125 = $(v850_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_126 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_111 = $(v850_BUILD_OUTPUTS)
subdir = .
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \
@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o
-@SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_81) \
-@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_82) \
+@SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_71) \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_72) \
@SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_2)
@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = mips/interp.o \
@SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_3) $(patsubst \
pkginclude_HEADERS = $(am__append_1)
noinst_LIBRARIES = common/libcommon.a $(am__append_3) $(am__append_6) \
$(am__append_8) $(am__append_10) $(am__append_12) \
- $(am__append_14) $(am__append_19) $(am__append_25) \
- $(am__append_31) $(am__append_37) $(am__append_41) \
- $(am__append_43) $(am__append_48) $(am__append_50) \
- $(am__append_52) $(am__append_57) $(am__append_62) \
- $(am__append_67) $(am__append_72) $(am__append_77) \
- $(am__append_79) $(am__append_84) $(am__append_93) \
- $(am__append_98) $(am__append_100) $(am__append_102) \
- $(am__append_108) $(am__append_110) $(am__append_112) \
- $(am__append_114) $(am__append_116) $(am__append_122)
-BUILT_SOURCES = $(am__append_16) $(am__append_21) $(am__append_28) \
- $(am__append_33) $(am__append_45) $(am__append_54) \
- $(am__append_59) $(am__append_69) $(am__append_86) \
- $(am__append_95) $(am__append_104) $(am__append_118) \
- $(am__append_124)
+ $(am__append_14) $(am__append_18) $(am__append_23) \
+ $(am__append_28) $(am__append_33) $(am__append_37) \
+ $(am__append_39) $(am__append_43) $(am__append_45) \
+ $(am__append_47) $(am__append_51) $(am__append_55) \
+ $(am__append_59) $(am__append_63) $(am__append_67) \
+ $(am__append_69) $(am__append_74) $(am__append_82) \
+ $(am__append_86) $(am__append_88) $(am__append_90) \
+ $(am__append_95) $(am__append_97) $(am__append_99) \
+ $(am__append_101) $(am__append_103) $(am__append_108)
+BUILT_SOURCES = $(am__append_16) $(am__append_20) $(am__append_26) \
+ $(am__append_30) $(am__append_41) $(am__append_49) \
+ $(am__append_53) $(am__append_61) $(am__append_76) \
+ $(am__append_84) $(am__append_92) $(am__append_105) \
+ $(am__append_110)
CLEANFILES = common/version.c common/version.c-stamp \
testsuite/common/bits-gen testsuite/common/bits32m0.c \
testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
testsuite/common/bits64m63.c
-DISTCLEANFILES = $(am__append_92)
+DISTCLEANFILES = $(am__append_81)
MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
$(SIM_ENABLED_ARCHES:%=%/hw-config.h) \
$(SIM_ENABLED_ARCHES:%=%/stamp-hw) \
$(common_GEN_MODULES_C_TARGETS) $(patsubst \
%,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_5) \
- site-sim-config.exp testrun.log testrun.sum $(am__append_18) \
- $(am__append_24) $(am__append_30) $(am__append_36) \
- $(am__append_47) $(am__append_56) $(am__append_61) \
- $(am__append_66) $(am__append_71) $(am__append_76) \
- $(am__append_91) $(am__append_97) $(am__append_106) \
- $(am__append_121) $(am__append_126)
+ site-sim-config.exp testrun.log testrun.sum $(am__append_17) \
+ $(am__append_22) $(am__append_27) $(am__append_32) \
+ $(am__append_42) $(am__append_50) $(am__append_54) \
+ $(am__append_58) $(am__append_62) $(am__append_66) \
+ $(am__append_80) $(am__append_85) $(am__append_93) \
+ $(am__append_107) $(am__append_111)
AM_CFLAGS = \
$(WERROR_CFLAGS) \
$(WARN_CFLAGS) \
COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
- $(common_GEN_MODULES_C_TARGETS) $(am__append_17) \
- $(am__append_22) $(am__append_29) $(am__append_34) \
- $(am__append_46) $(am__append_55) $(am__append_60) \
- $(am__append_64) $(am__append_70) $(am__append_74) \
- $(am__append_90) $(am__append_96) $(am__append_105) \
- $(am__append_119) $(am__append_125)
+ $(common_GEN_MODULES_C_TARGETS)
SIM_INSTALL_DATA_LOCAL_DEPS =
-SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_39)
-SIM_UNINSTALL_LOCAL_DEPS = $(am__append_40)
+SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_35)
+SIM_UNINSTALL_LOCAL_DEPS = $(am__append_36)
SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=)
SIM_COMPILE = \
$(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \
@SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
@SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
-@SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_81) \
-@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_82) $(am__append_83)
+@SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_71) \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_72) $(am__append_73)
@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = \
@SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_SOURCES)
@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
@SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
-@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_87) $(am__append_88) \
-@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89)
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_77) $(am__append_78) \
+@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_79)
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_bpf_TRUE@-@am__include@ bpf/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_cr16_TRUE@-@am__include@ cr16/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_cris_TRUE@-@am__include@ cris/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_d10v_TRUE@-@am__include@ d10v/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_frv_TRUE@-@am__include@ frv/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_iq2000_TRUE@-@am__include@ iq2000/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_lm32_TRUE@-@am__include@ lm32/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_m32c_TRUE@-@am__include@ m32c/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_m32r_TRUE@-@am__include@ m32r/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_m68hc11_TRUE@-@am__include@ m68hc11/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_mips_TRUE@-@am__include@ mips/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_mn10300_TRUE@-@am__include@ mn10300/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_or1k_TRUE@-@am__include@ or1k/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
@SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_sh_TRUE@-@am__include@ sh/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c ; $(SIM_COMPILE)
@SIM_ENABLE_ARCH_v850_TRUE@-@am__include@ v850/$(DEPDIR)/*.Po
+
@SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen