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add comment explaining why invert isnt done in zeroing test
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 1 Oct 2018 14:09:21 +0000
(15:09 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 1 Oct 2018 14:09:21 +0000
(15:09 +0100)
(already inverted basically)
riscv/insn_template_sv.cc
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diff --git
a/riscv/insn_template_sv.cc
b/riscv/insn_template_sv.cc
index 475c8e542f7f7e78cb34f5ed7dfe6af46958480d..2feaf48b6676e720a2cecec291ac9d296dc4820c 100644
(file)
--- a/
riscv/insn_template_sv.cc
+++ b/
riscv/insn_template_sv.cc
@@
-46,6
+46,7
@@
reg_t FN(processor_t* p, insn_t s_insn, reg_t pc)
insn.reset_vloop_check();
#include INCLUDEFILE
#if defined(USING_REG_RD) || defined(USING_REG_FRD)
+ // don't check inversion here as dest_pred has already been inverted
if (zeroing && ((dest_pred & (1<<voffs)) == 0))
{
// insn._rd() would be predicated: have to use insn._rd() here