lima/gpir: Do all lowerings before rsched

The scheduler assumes that load nodes are always duplicated so that they
can always be scheduled eventually and therefore they never need to be
spilled. But some lowerings were running after the pre-RA scheduler,
whereas duplication has to happen before then since it's needed for the
scheduler to do a better job reducing register pressure. This meant
that lowerings were introducing multiple uses of a load instruction,
which broke the scheduler's expectation and resulted in infinite loops
in situations where the only nodes available to spill were load nodes.
Spilling load nodes would be silly, so we want to fix the lowerings
rather than the scheduler. Just do all lowerings before the pre-RA
scheduler, which also helps with reducing pressure since the scheduler
can more accurately compute the pressure.

Fixes lima/mesa#104.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com>

diff --git a/src/gallium/drivers/lima/ir/gp/gpir.h b/src/gallium/drivers/lima/ir/gp/gpir.h
index 36553a7e169908afb8a92dac59dead77a290dd74..24924c92567f39fb5602451b4a03a47db0b87948 100644 (file)
--- a/src/gallium/drivers/lima/ir/gp/gpir.h
+++ b/src/gallium/drivers/lima/ir/gp/gpir.h
@@ -442,7 +442,6 @@ void gpir_instr_print_prog(gpir_compiler *comp);
 bool gpir_codegen_acc_same_op(gpir_op op1, gpir_op op2);
 
 bool gpir_pre_rsched_lower_prog(gpir_compiler *comp);
-bool gpir_post_rsched_lower_prog(gpir_compiler *comp);
 bool gpir_reduce_reg_pressure_schedule_prog(gpir_compiler *comp);
 bool gpir_regalloc_prog(gpir_compiler *comp);
 bool gpir_schedule_prog(gpir_compiler *comp);

diff --git a/src/gallium/drivers/lima/ir/gp/lower.c b/src/gallium/drivers/lima/ir/gp/lower.c
index 6c5f2db7e333161731718816aa7de06e08845df0..6d6aa7e80ff010c421a0a687932fd3ffe5a7e325 100644 (file)
--- a/src/gallium/drivers/lima/ir/gp/lower.c
+++ b/src/gallium/drivers/lima/ir/gp/lower.c
@@ -416,9 +416,6 @@ static bool gpir_lower_not(gpir_block *block, gpir_node *node)
 
 static bool (*gpir_pre_rsched_lower_funcs[gpir_op_num])(gpir_block *, gpir_node *) = {
    [gpir_op_not] = gpir_lower_not,
-};
-
-static bool (*gpir_post_rsched_lower_funcs[gpir_op_num])(gpir_block *, gpir_node *) = {
    [gpir_op_neg] = gpir_lower_neg,
    [gpir_op_rcp] = gpir_lower_complex,
    [gpir_op_rsqrt] = gpir_lower_complex,
@@ -445,25 +442,11 @@ bool gpir_pre_rsched_lower_prog(gpir_compiler *comp)
    if (!gpir_lower_load(comp))
       return false;
 
-   gpir_debug("pre rsched lower prog\n");
-   gpir_node_print_prog_seq(comp);
-   return true;
-}
-
-bool gpir_post_rsched_lower_prog(gpir_compiler *comp)
-{
-   list_for_each_entry(gpir_block, block, &comp->block_list, list) {
-      list_for_each_entry_safe(gpir_node, node, &block->node_list, list) {
-         if (gpir_post_rsched_lower_funcs[node->op] &&
-             !gpir_post_rsched_lower_funcs[node->op](block, node))
-            return false;
-      }
-   }
-
    if (!gpir_lower_node_may_consume_two_slots(comp))
       return false;
 
-   gpir_debug("post rsched lower prog\n");
+   gpir_debug("pre rsched lower prog\n");
    gpir_node_print_prog_seq(comp);
    return true;
 }
+

diff --git a/src/gallium/drivers/lima/ir/gp/nir.c b/src/gallium/drivers/lima/ir/gp/nir.c
index 5a619d8d148e90b97620e9fcfebc07cfbe4c4d0c..567d2aa18962a9128eb65d3d858b58cf4fa9c8e3 100644 (file)
--- a/src/gallium/drivers/lima/ir/gp/nir.c
+++ b/src/gallium/drivers/lima/ir/gp/nir.c
@@ -445,9 +445,6 @@ bool gpir_compile_nir(struct lima_vs_shader_state *prog, struct nir_shader *nir,
    if (!gpir_reduce_reg_pressure_schedule_prog(comp))
       goto err_out0;
 
-   if (!gpir_post_rsched_lower_prog(comp))
-      goto err_out0;
-
    if (!gpir_regalloc_prog(comp))
       goto err_out0;