[AArch64] Fix illegal assembly 'eon v1, v2, v3'
authorAlan Lawrence <alan.lawrence@arm.com>
Wed, 25 Feb 2015 14:20:13 +0000 (14:20 +0000)
committerAlan Lawrence <alalaw01@gcc.gnu.org>
Wed, 25 Feb 2015 14:20:13 +0000 (14:20 +0000)
        PR target/64997
        * config/aarch64/aarch64.md (*xor_one_cmpl<mode>3): Use FP_REGNUM_P
        as split condition; force split via '#' in output pattern.

From-SVN: r220969

gcc/ChangeLog
gcc/config/aarch64/aarch64.md

index d4304cd71ea4c60792d0701bd1a3f30f04db8bf1..1e2b60971695ad6dc2317e72697b901e0ea5f798 100644 (file)
@@ -1,3 +1,9 @@
+2015-02-25  Alan Lawrence  <alan.lawrence@arm.com>
+
+       PR target/64997
+       * config/aarch64/aarch64.md (*xor_one_cmpl<mode>3): Use FP_REGNUM_P
+       as split condition; force split via '#' in output pattern.
+
 2015-02-25  Richard Biener  <rguenther@suse.de>
        Kai Tietz  <ktietz@redhat.com>
 
index 8f157ce2901362222da27011452095a46e4bf30d..7103e0d86394a84b6a810827d7710d08d19bcaad 100644 (file)
         (not:GPI (xor:GPI (match_operand:GPI 1 "register_operand" "r,?w")
                           (match_operand:GPI 2 "register_operand" "r,w"))))]
   ""
-  "eon\\t%<w>0, %<w>1, %<w>2" ;; For GPR registers (only).
-  "reload_completed && (which_alternative == 1)" ;; For SIMD registers.
+  "@
+  eon\\t%<w>0, %<w>1, %<w>2
+  #"
+  "reload_completed && FP_REGNUM_P (REGNO (operands[0]))" ;; For SIMD registers.
   [(set (match_operand:GPI 0 "register_operand" "=w")
         (xor:GPI (match_operand:GPI 1 "register_operand" "w")
                  (match_operand:GPI 2 "register_operand" "w")))