nir/lower_int64: lower imin3/imax3/umin3/umax3/imed3/umed3

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.*.i64.*
with ACO because this backend compiler expects most of the 64-bit
operations to be lowered.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4570>

diff --git a/src/compiler/nir/nir_lower_int64.c b/src/compiler/nir/nir_lower_int64.c
index e18a54812259f8d3ee4f5fdc6d1b382e8e18c1a9..7eb0ae5240307609c0d9dffb72f31d040a3231ec 100644 (file)
--- a/src/compiler/nir/nir_lower_int64.c
+++ b/src/compiler/nir/nir_lower_int64.c
@@ -716,6 +716,12 @@ nir_lower_int64_op_to_options_mask(nir_op opcode)
    case nir_op_imax:
    case nir_op_umin:
    case nir_op_umax:
+   case nir_op_imin3:
+   case nir_op_imax3:
+   case nir_op_umin3:
+   case nir_op_umax3:
+   case nir_op_imed3:
+   case nir_op_umed3:
       return nir_lower_minmax64;
    case nir_op_iabs:
       return nir_lower_iabs64;
@@ -815,6 +821,18 @@ lower_int64_alu_instr(nir_builder *b, nir_instr *instr, void *_state)
       return lower_umin64(b, src[0], src[1]);
    case nir_op_umax:
       return lower_umax64(b, src[0], src[1]);
+   case nir_op_imin3:
+      return lower_imin64(b, src[0], lower_imin64(b, src[1], src[2]));
+   case nir_op_imax3:
+      return lower_imax64(b, src[0], lower_imax64(b, src[1], src[2]));
+   case nir_op_umin3:
+      return lower_umin64(b, src[0], lower_umin64(b, src[1], src[2]));
+   case nir_op_umax3:
+      return lower_umax64(b, src[0], lower_umax64(b, src[1], src[2]));
+   case nir_op_imed3:
+      return lower_imax64(b, lower_imin64(b, lower_imax64(b, src[0], src[1]), src[2]), lower_imin64(b, src[0], src[1]));
+   case nir_op_umed3:
+      return lower_umax64(b, lower_umin64(b, lower_umax64(b, src[0], src[1]), src[2]), lower_umin64(b, src[0], src[1]));
    case nir_op_iabs:
       return lower_iabs64(b, src[0]);
    case nir_op_ineg: