+2016-10-05 Andrew Senkevich <andrew.senkevich@intel.com>
+
+ * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
+ OPTION_MASK_ISA_PCOMMIT_SET): Deleted definitions.
+ (ix86_handle_option): Deleted handle of OPT_mpcommit.
+ * config.gcc: Deleted pcommitintrin.h
+ * config/i386/pcommitintrin.h: Deleted file.
+ * config/i386/cpuid.h (bit_PCOMMIT): Deleted.
+ * config/i386/driver-i386.c (host_detect_local_cpu): Deleted pcommit
+ detection.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Deleted define
+ __PCOMMIT__.
+ * config/i386/i386.c (ix86_target_string): Deleted -mpcommit.
+ (PTA_PCOMMIT): Deleted define.
+ (ix86_option_override_internal): Deleted handle of option.
+ (ix86_valid_target_attribute_inner_p): Deleted pcommit.
+ * config/i386/i386-builtin.def (IX86_BUILTIN_PCOMMIT,
+ __builtin_ia32_pcommit): Deleted.
+ * config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Deleted.
+ * config/i386/i386.md (unspecv): Deleted UNSPECV_PCOMMIT.
+ (pcommit): Deleted instruction.
+ * config/i386/i386.opt: Mention -mpcommit deprecation.
+ * config/i386/x86intrin.h: Deleted inclusion of pcommitintrin.h.
+
2016-10-05 Uros Bizjak <ubizjak@gmail.com>
PR target/77874
#define OPTION_MASK_ISA_XSAVEC_SET \
(OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE)
#define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
-#define OPTION_MASK_ISA_PCOMMIT_SET OPTION_MASK_ISA_PCOMMIT
/* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
as -msse4.2. */
#define OPTION_MASK_ISA_CLFLUSHOPT_UNSET OPTION_MASK_ISA_CLFLUSHOPT
#define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
#define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
-#define OPTION_MASK_ISA_PCOMMIT_UNSET OPTION_MASK_ISA_PCOMMIT
#define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
#define OPTION_MASK_ISA_MWAITX_UNSET OPTION_MASK_ISA_MWAITX
#define OPTION_MASK_ISA_CLZERO_UNSET OPTION_MASK_ISA_CLZERO
}
return true;
- case OPT_mpcommit:
- if (value)
- {
- opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCOMMIT_SET;
- opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_SET;
- }
- else
- {
- opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCOMMIT_UNSET;
- opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_UNSET;
- }
- return true;
-
case OPT_mclwb:
if (value)
{
xsavesintrin.h avx512dqintrin.h avx512bwintrin.h
avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h
avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h
- avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h
- mwaitxintrin.h clzerointrin.h pkuintrin.h"
+ avx512vbmivlintrin.h clwbintrin.h mwaitxintrin.h
+ clzerointrin.h pkuintrin.h"
;;
x86_64-*-*)
cpu_type=i386
xsavesintrin.h avx512dqintrin.h avx512bwintrin.h
avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h
avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h
- avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h
- mwaitxintrin.h clzerointrin.h pkuintrin.h"
+ avx512vbmivlintrin.h clwbintrin.h mwaitxintrin.h
+ clzerointrin.h pkuintrin.h"
;;
ia64-*-*)
extra_headers=ia64intrin.h
#define bit_RDSEED (1 << 18)
#define bit_ADX (1 << 19)
#define bit_AVX512IFMA (1 << 21)
-#define bit_PCOMMIT (1 << 22)
#define bit_CLFLUSHOPT (1 << 23)
#define bit_CLWB (1 << 24)
#define bit_AVX512PF (1 << 26)
unsigned int has_clflushopt = 0, has_xsavec = 0, has_xsaves = 0;
unsigned int has_avx512dq = 0, has_avx512bw = 0, has_avx512vl = 0;
unsigned int has_avx512vbmi = 0, has_avx512ifma = 0, has_clwb = 0;
- unsigned int has_pcommit = 0, has_mwaitx = 0;
- unsigned int has_clzero = 0, has_pku = 0;
+ unsigned int has_mwaitx = 0, has_clzero = 0, has_pku = 0;
bool arch;
has_avx512pf = ebx & bit_AVX512PF;
has_avx512cd = ebx & bit_AVX512CD;
has_sha = ebx & bit_SHA;
- has_pcommit = ebx & bit_PCOMMIT;
has_clflushopt = ebx & bit_CLFLUSHOPT;
has_clwb = ebx & bit_CLWB;
has_avx512dq = ebx & bit_AVX512DQ;
const char *avx512ifma = has_avx512ifma ? " -mavx512ifma" : " -mno-avx512ifma";
const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi";
const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb";
- const char *pcommit = has_pcommit ? " -mpcommit" : " -mno-pcommit";
const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx";
const char *clzero = has_clzero ? " -mclzero" : " -mno-clzero";
const char *pku = has_pku ? " -mpku" : " -mno-pku";
fxsr, xsave, xsaveopt, avx512f, avx512er,
avx512cd, avx512pf, prefetchwt1, clflushopt,
xsavec, xsaves, avx512dq, avx512bw, avx512vl,
- avx512ifma, avx512vbmi, clwb, pcommit, mwaitx,
+ avx512ifma, avx512vbmi, clwb, mwaitx,
clzero, pku, NULL);
}
BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask_store, "__builtin_ia32_pmovusdw256mem_mask", IX86_BUILTIN_PMOVUSDW256_MEM, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8SI_UQI)
BDESC (OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask_store, "__builtin_ia32_pmovusdw128mem_mask", IX86_BUILTIN_PMOVUSDW128_MEM, UNKNOWN, (int) VOID_FTYPE_PV8HI_V4SI_UQI)
-/* PCOMMIT. */
-BDESC (OPTION_MASK_ISA_PCOMMIT, CODE_FOR_pcommit, "__builtin_ia32_pcommit", IX86_BUILTIN_PCOMMIT, UNKNOWN, (int) VOID_FTYPE_VOID)
-
/* RDPKRU and WRPKRU. */
BDESC (OPTION_MASK_ISA_PKU, CODE_FOR_rdpkru, "__builtin_ia32_rdpkru", IX86_BUILTIN_RDPKRU, UNKNOWN, (int) UNSIGNED_FTYPE_VOID)
BDESC (OPTION_MASK_ISA_PKU, CODE_FOR_wrpkru, "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
def_or_undef (parse_in, "__XSAVES__");
if (isa_flag & OPTION_MASK_ISA_MPX)
def_or_undef (parse_in, "__MPX__");
- if (isa_flag & OPTION_MASK_ISA_PCOMMIT)
- def_or_undef (parse_in, "__PCOMMIT__");
if (isa_flag & OPTION_MASK_ISA_CLWB)
def_or_undef (parse_in, "__CLWB__");
if (isa_flag & OPTION_MASK_ISA_MWAITX)
{ "-mxsaves", OPTION_MASK_ISA_XSAVES },
{ "-mmpx", OPTION_MASK_ISA_MPX },
{ "-mclwb", OPTION_MASK_ISA_CLWB },
- { "-mpcommit", OPTION_MASK_ISA_PCOMMIT },
{ "-mmwaitx", OPTION_MASK_ISA_MWAITX },
{ "-mclzero", OPTION_MASK_ISA_CLZERO },
{ "-mpku", OPTION_MASK_ISA_PKU },
#define PTA_AVX512IFMA (HOST_WIDE_INT_1 << 53)
#define PTA_AVX512VBMI (HOST_WIDE_INT_1 << 54)
#define PTA_CLWB (HOST_WIDE_INT_1 << 55)
-#define PTA_PCOMMIT (HOST_WIDE_INT_1 << 56)
-#define PTA_MWAITX (HOST_WIDE_INT_1 << 57)
-#define PTA_CLZERO (HOST_WIDE_INT_1 << 58)
-#define PTA_NO_80387 (HOST_WIDE_INT_1 << 59)
-#define PTA_PKU (HOST_WIDE_INT_1 << 60)
+#define PTA_MWAITX (HOST_WIDE_INT_1 << 56)
+#define PTA_CLZERO (HOST_WIDE_INT_1 << 57)
+#define PTA_NO_80387 (HOST_WIDE_INT_1 << 58)
+#define PTA_PKU (HOST_WIDE_INT_1 << 59)
#define PTA_CORE2 \
(PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 \
if (processor_alias_table[i].flags & PTA_PREFETCHWT1
&& !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PREFETCHWT1))
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1;
- if (processor_alias_table[i].flags & PTA_PCOMMIT
- && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PCOMMIT))
- opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCOMMIT;
if (processor_alias_table[i].flags & PTA_CLWB
&& !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLWB))
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB;
IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
IX86_ATTR_ISA ("clwb", OPT_mclwb),
- IX86_ATTR_ISA ("pcommit", OPT_mpcommit),
IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx),
IX86_ATTR_ISA ("clzero", OPT_mclzero),
IX86_ATTR_ISA ("pku", OPT_mpku),
#define TARGET_PREFETCHWT1_P(x) TARGET_ISA_PREFETCHWT1_P(x)
#define TARGET_MPX TARGET_ISA_MPX
#define TARGET_MPX_P(x) TARGET_ISA_MPX_P(x)
-#define TARGET_PCOMMIT TARGET_ISA_PCOMMIT
-#define TARGET_PCOMMIT_P(x) TARGET_ISA_PCOMMIT_P(x)
#define TARGET_CLWB TARGET_ISA_CLWB
#define TARGET_CLWB_P(x) TARGET_ISA_CLWB_P(x)
#define TARGET_MWAITX TARGET_ISA_MWAITX
;; For CLWB support
UNSPECV_CLWB
- ;; For PCOMMIT support
- UNSPECV_PCOMMIT
-
;; For CLFLUSHOPT support
UNSPECV_CLFLUSHOPT
[(set_attr "type" "other")
(set_attr "length" "3")])
-(define_insn "pcommit"
- [(unspec_volatile [(const_int 0)] UNSPECV_PCOMMIT)]
- "TARGET_PCOMMIT"
- "pcommit"
- [(set_attr "type" "other")
- (set_attr "length" "4")])
-
(define_insn "clwb"
[(unspec_volatile [(match_operand 0 "address_operand" "p")]
UNSPECV_CLWB)]
Support CLWB instruction.
mpcommit
-Target Report Mask(ISA_PCOMMIT) Var(ix86_isa_flags) Save
-Support PCOMMIT instruction.
+Target Undocumented Warn(%<-mpcommit%> was deprecated)
+;; Deprecated
mfxsr
Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
+++ /dev/null
-/* Copyright (C) 2013-2016 Free Software Foundation, Inc.
-
- This file is part of GCC.
-
- GCC is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- GCC is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#if !defined _X86INTRIN_H_INCLUDED
-# error "Never use <pcommitintrin.h> directly; include <x86intrin.h> instead."
-#endif
-
-#ifndef _PCOMMITINTRIN_H_INCLUDED
-#define _PCOMMITINTRIN_H_INCLUDED
-
-#ifndef __PCOMMIT__
-#pragma GCC push_options
-#pragma GCC target("pcommit")
-#define __DISABLE_PCOMMIT__
-#endif /* __PCOMMIT__ */
-
-extern __inline void
-__attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_mm_pcommit (void)
-{
- __builtin_ia32_pcommit ();
-}
-
-#ifdef __DISABLE_PCOMMIT__
-#undef __DISABLE_PCOMMIT__
-#pragma GCC pop_options
-#endif /* __DISABLE_PCOMMIT__ */
-
-#endif /* _PCOMMITINTRIN_H_INCLUDED */
#include <clwbintrin.h>
-#include <pcommitintrin.h>
-
#include <clflushoptintrin.h>
#include <xsavesintrin.h>
+2016-10-05 Andrew Senkevich <andrew.senkevich@intel.com>
+
+ * gcc.target/i386/pcommit-1.c: Deleted.
+ * gcc.target/i386/sse-12.c: Deleted -pcommit option.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * gcc.target/i386/sse-14.c: Ditto.
+ * gcc.target/i386/sse-22.c: Ditto.
+ * gcc.target/i386/sse-23.c: Ditto.
+ * g++.dg/other/i386-2.C: Ditto.
+
2016-10-05 Uros Bizjak <ubizjak@gmail.com>
* gcc.target/i386/pr77833.c: Require int128 effective target.
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */
+/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mmwaitx -mclzero -mpku" } */
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */
+/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mmwaitx -mclzero -mpku" } */
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
+++ /dev/null
-/* { dg-do compile } */
-/* { dg-options "-O2 -mpcommit" } */
-/* { dg-final { scan-assembler "pcommit" } } */
-
-#include "x86intrin.h"
-
-void
-test_pcommit ()
-{
- _mm_pcommit ();
-}
popcntintrin.h and mm_malloc.h are usable
with -O -std=c89 -pedantic-errors. */
/* { dg-do compile } */
-/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */
+/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mclwb -mmwaitx -mclzero -mpku" } */
#include <x86intrin.h>
/* { dg-do compile } */
-/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */
+/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mclwb -mmwaitx -mclzero -mpku" } */
/* { dg-add-options bind_pic_locally } */
#include <mm_malloc.h>
/* { dg-do compile } */
-/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx -mclzero" } */
+/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mmwaitx -mclzero" } */
/* { dg-add-options bind_pic_locally } */
#include <mm_malloc.h>
/* x86intrin.h (FMA4/XOP/LWP/BMI/BMI2/TBM/LZCNT/FMA). */
#ifdef DIFFERENT_PRAGMAS
-#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt,xsavec,xsaves,clflushopt,clwb,pcommit,pku")
+#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt,xsavec,xsaves,clflushopt,clwb,pku")
#endif
#include <x86intrin.h>
/* xopintrin.h */
#define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D)
#define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D)
-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,clwb,pcommit,mwaitx,clzero,pku")
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,clwb,mwaitx,clzero,pku")
#include <x86intrin.h>
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