realised that the bitwidth sign-extension needs to be FROM the
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 10 Nov 2018 06:27:52 +0000 (06:27 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 10 Nov 2018 06:27:52 +0000 (06:27 +0000)
source bitwidth not TO the TARGET bitwidth

riscv/sv_insn_redirect.cc

index bb8645cc4a5bbde48f6d4bf856aaed1e5a58a5d5..937b232e9e0662b2a88257925ce924891846d502 100644 (file)
@@ -453,12 +453,14 @@ bool sv_proc_t::rv_int_op_prepare(SLHSTYPE const & lhs, SRHSTYPE const & rhs, \
     if (bitwidth == xlen) {                                                \
         return true;                                                       \
     }                                                                   \
+    uint8_t lbitwidth = get_bitwidth(lhs.get_elwidth(), xlen);            \
+    uint8_t rbitwidth = get_bitwidth(lhs.get_elwidth(), xlen);            \
     if (_insn->signextended) {                                             \
-        vlhs = sext_bwid(lhs, bitwidth);                                   \
-        vrhs = sext_bwid(rhs, bitwidth);                                   \
+        vlhs = sext_bwid(lhs, lbitwidth);                                   \
+        vrhs = sext_bwid(rhs, rbitwidth);                                   \
     } else {                                                               \
-        vlhs = zext_bwid(lhs, bitwidth);                                   \
-        vrhs = zext_bwid(rhs, bitwidth);                                   \
+        vlhs = zext_bwid(lhs, lbitwidth);                                   \
+        vrhs = zext_bwid(rhs, rbitwidth);                                   \
     }                                                                   \
     return false;                                                          \
 }                                                                   \
@@ -556,6 +558,11 @@ OP_MULH_FN(_mulhsu, sv_sreg_t, sv_reg_t, sv_sreg_t, int64_t, uint64_t, int64_t )
 OP_MULH_FN(_mulh  , sv_sreg_t, sv_sreg_t, sv_sreg_t, int64_t, int64_t, int64_t )
 
 /* 64-bit mulh/mulhu/mulhsu */
+sv_reg_t (sv_proc_t::mulhu)(sv_reg_t const& a, sv_reg_t const& b)
+{
+    return sv_reg_t(::mulhu(a, b));
+}
+
 sv_sreg_t (sv_proc_t::mulhsu)(sv_sreg_t const& a, sv_reg_t const& b)
 {
     return sv_sreg_t(::mulhsu(a, b));
@@ -566,11 +573,6 @@ sv_sreg_t (sv_proc_t::mulh)(sv_sreg_t const& a, sv_sreg_t const& b)
     return sv_sreg_t(::mulh(a, b));
 }
 
-sv_reg_t (sv_proc_t::mulhu)(sv_reg_t const& a, sv_reg_t const& b)
-{
-    return sv_reg_t(::mulhu(a, b));
-}
-
 sv_reg_t sv_proc_t::rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs)
 {
     return rv_sl(lhs, rhs, xlen);