re PR rtl-optimization/64818 (User specified register don't work correctly in inline...

gcc/ChangeLog:
2015-04-22  Hale Wang  <hale.wang@arm.com>
            Terry Guo  <terry.guo@arm.com>

       PR rtl-optimization/64818
       * combine.c (can_combine_p): Don't combine user-specified
       register if it is in an asm input.

gcc/testsuite/ChangeLog
2015-04-22  Hale Wang  <hale.wang@arm.com>
            Terry Guo  <terry.guo@arm.com>

       PR rtl-optimization/64818
       * gcc.target/arm/pr64818.c: New test.

Co-Authored-By: Terry Guo <terry.guo@arm.com>
From-SVN: r222306

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6959c061a06a230bc401315ad1621c6f466ef2db..2755252c291a2470633d2c1b38b5ae67fcfda554 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2015-04-22  Hale Wang  <hale.wang@arm.com>
+           Terry Guo  <terry.guo@arm.com>
+
+       PR rtl-optimization/64818
+       * combine.c (can_combine_p): Don't combine user-specified
+       register if it is in an asm input.
+
 2015-04-21  Jan Hubicka  <hubicka@ucw.cz>
 
        PR ipa/65076

diff --git a/gcc/combine.c b/gcc/combine.c
index 6f0007af24e1f8bb0f3ec06fec5fd9c168543afc..6cd55dd4432791c5e039df1c6f08f6d7613e8d1c 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -1910,6 +1910,15 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED,
   set = expand_field_assignment (set);
   src = SET_SRC (set), dest = SET_DEST (set);
 
+  /* Do not eliminate user-specified register if it is in an
+     asm input because we may break the register asm usage defined
+     in GCC manual if allow to do so.
+     Be aware that this may cover more cases than we expect but this
+     should be harmless.  */
+  if (REG_P (dest) && REG_USERVAR_P (dest) && HARD_REGISTER_P (dest)
+      && extract_asm_operands (PATTERN (i3)))
+    return 0;
+
   /* Don't eliminate a store in the stack pointer.  */
   if (dest == stack_pointer_rtx
       /* Don't combine with an insn that sets a register to itself if it has

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8b2b177e8848d5cf99d7d2ad8b5c3ecc89008a15..fd3f7006a893fb9fc1a97679c0b63884552db23a 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-04-22  Hale Wang  <hale.wang@arm.com>
+           Terry Guo  <terry.guo@arm.com>
+
+       PR rtl-optimization/64818
+       * gcc.target/arm/pr64818.c: New test.
+
 2015-04-21 Jan Hubicka  <hubicka@ucw.cz>
 
        PR ipa/65076

diff --git a/gcc/testsuite/gcc.target/arm/pr64818.c b/gcc/testsuite/gcc.target/arm/pr64818.c
new file mode 100644 (file)
index 0000000..bddd846
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr64818.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+char temp[16];
+extern int foo1 (void);
+
+void foo (void)
+{
+  int i;
+  int len;
+
+  while (1)
+  {
+    len = foo1 ();
+    register int a asm ("r0") = 5;
+    register char *b asm ("r1") = temp;
+    register int c asm ("r2") = len;
+    asm volatile ("mov %[r0], %[r0]\n  mov %[r1], %[r1]\n  mov %[r2], %[r2]\n"
+                  : "+m"(*b)
+                  : [r0]"r"(a), [r1]"r"(b), [r2]"r"(c));
+
+    for (i = 0; i < len; i++)
+    {
+      if (temp[i] == 10)
+      return;
+    }
+  }
+}
+
+/* { dg-final { scan-assembler "\[\\t \]+mov\ r1,\ r1" } } */