cris: Use addi.b for additions where flags aren't inspected

Comparing to the cc0 version of the CRIS port, I ran a few
microbenchmarks, for example gcc.c-torture/execute/arith-rand.c,
where there's sometimes an addition between an operation of
interest and the test on the result.

Unfortunately this patch doesn't remedy all the performance
regression for that program.  But, this patch by itself helps
and makes sense to commit separately: lots of addi.b in
previously empty delay-slots, with functions shortened by one or
a few insns, in libgcc.  I had an experience with the
reload-related caveat of % on constraints, which is "fixed"
documentationwise since long (soon 15 years ago;
be3914df4cc8/r105517).  I removed an even older related FIXME.

gcc:
	PR target/93372
	* config/cris/cris.md ("*add<mode>3_addi"): New splitter.
	("*addi_b_<mode>"): New pattern.
	("*addsi3<setnz>"): Remove stale %-related comment.

gcc/testsuite:
	PR target/93372
	* gcc.target/cris/pr93372-45.c: New test.

diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 074f523440285c89f664897d693bbedc24a29573..efafb5b1be1496bbc95c98a8b70ee60a74695d6a 100644 (file)
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -973,7 +973,6 @@
 ;; The last constraint is due to that after reload, the '%' is not
 ;; honored, and canonicalization doesn't care about keeping the same
 ;; register as in destination.  This will happen after insn splitting.
-;; gcc <= 2.7.2.  FIXME: Check for gcc-2.9x
 
  ""
 {
@@ -1291,6 +1290,45 @@
   [(set_attr "slottable" "yes")
    (set_attr "cc" "none")])
 
+;; This pattern is usually generated after reload, so a '%' is
+;; ineffective; use explicit combinations.
+(define_insn "*addi_b_<mode>"
+  [(set (match_operand:BWD 0 "register_operand" "=r,r")
+       (plus:BWD
+        (match_operand:BWD 1 "register_operand" "0,r")
+        (match_operand:BWD 2 "register_operand" "r,0")))]
+  ""
+  "@
+   addi %2.b,%0
+   addi %1.b,%0"
+  [(set_attr "slottable" "yes")])
+
+;; Strip the dccr clobber from addM3 with register operands, if the
+;; next instruction isn't using it.
+;; Not clobbering dccr may let cmpelim match a later compare with a
+;; previous operation of interest.  This has to run before cmpelim so it
+;; can't be a peephole2.  See gcc.target/cris/pr93372-45.c for a
+;; test-case.
+(define_split ;; "*add<mode>3_addi"
+  [(parallel
+    [(set (match_operand:BWD 0 "register_operand")
+         (plus:BWD
+          (match_operand:BWD 1 "register_operand")
+          (match_operand:BWD 2 "register_operand")))
+     (clobber (reg:CC CRIS_CC0_REGNUM))])]
+  "reload_completed"
+  [(set (match_dup 0) (plus:BWD (match_dup 1) (match_dup 2)))]
+{
+  rtx reg = operands[0];
+  rtx_insn *i = next_nonnote_nondebug_insn_bb (curr_insn);
+
+  while (i != NULL_RTX && (!INSN_P (i) || DEBUG_INSN_P (i)))
+    i = next_nonnote_nondebug_insn_bb (i);
+
+  if (i == NULL_RTX || reg_mentioned_p (reg, i) || BARRIER_P (i))
+    FAIL;
+})
+
 (define_insn "<u>mul<s><mode>3"
   [(set (match_operand:WD 0 "register_operand" "=r")
        (mult:WD

diff --git a/gcc/testsuite/gcc.target/cris/pr93372-45.c b/gcc/testsuite/gcc.target/cris/pr93372-45.c
new file mode 100644 (file)
index 0000000..4fb7a9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/cris/pr93372-45.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not {\tcmp|\ttest} } } */
+
+extern void foo(void);
+unsigned int x (unsigned int b, unsigned int a, unsigned int *c)
+{
+  unsigned int y = a & 15;
+  unsigned int z = y + b;
+  if (y == 0)
+    *c = z;
+  return z;
+}