i965: Add a flag for instructions with normal writemasking disabled.

For getting values from the new timestamp register, the channels we
load have nothing to do with the pixels dispatched.

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 00ba3349bf779f19f91277571720ebabb5d2d36f..903d7eda088ebc5738d10d1ca8cc4a29e4c1b354 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -175,6 +175,7 @@ public:
    bool shadow_compare;
    bool force_uncompressed;
    bool force_sechalf;
+   bool force_writemask_all;
    uint32_t offset; /* spill/unspill offset */
 
    /** @{

diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 37eed1b9f748ce86a98e86bbda23d333bbe40577..87a7e9b81c5e2c049f2f2f7f310fbd34431c664a 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -916,6 +916,7 @@ fs_generator::generate_code(exec_list *instructions)
       brw_set_predicate_control(p, inst->predicate);
       brw_set_predicate_inverse(p, inst->predicate_inverse);
       brw_set_saturate(p, inst->saturate);
+      brw_set_mask_control(p, inst->force_writemask_all);
 
       if (inst->force_uncompressed || dispatch_width == 8) {
         brw_set_compression_control(p, BRW_COMPRESSION_NONE);

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index d0609414253a0c1e9d084ea0c8abccf8f376195c..8c6f56a2fdc5c3f1c45d620aab094da11122cb12 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -171,6 +171,7 @@ public:
    src_reg src[3];
 
    bool saturate;
+   bool force_writemask_all;
 
    int conditional_mod; /**< BRW_CONDITIONAL_* */
 

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 7609d92a72ff783b42b97f6fa985a71b8329fad8..0c6b358af6ca328f9f60353123b42e4d8c89f7a0 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -723,6 +723,7 @@ vec4_generator::generate_code(exec_list *instructions)
       brw_set_predicate_control(p, inst->predicate);
       brw_set_predicate_inverse(p, inst->predicate_inverse);
       brw_set_saturate(p, inst->saturate);
+      brw_set_mask_control(p, inst->force_writemask_all);
 
       switch (inst->opcode) {
       case BRW_OPCODE_MOV: