* config/cris/cris.md ("umulhisi3", "umulqihi3", "mulsi3")

	("mulqihi3", "mulhisi3", "mulsidi3", "umulsidi3"): Mark input
	operands as commutative in constraints.

From-SVN: r95505

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a367dbd1ef7ce24e74f2f93e96b6b44b76f1a7a9..5a9024d8a29dd17c36b5c4587f2f36ead003b3ae 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2005-02-24  Hans-Peter Nilsson  <hp@axis.com>
+
+       * config/cris/cris.md ("umulhisi3", "umulqihi3", "mulsi3")
+       ("mulqihi3", "mulhisi3", "mulsidi3", "umulsidi3"): Mark input
+       operands as commutative in constraints.
+
 2005-02-24  Diego Novillo  <dnovillo@redhat.com>
 
        * tree-into-ssa.c: Re-organize internal functions.

diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index d4e4a5a5eed64f5696e7a8ac25383e0300c22916..03ca50aedb7994247ded040b14eecea41977940e 100644 (file)
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -2470,7 +2470,7 @@
 (define_insn "umulhisi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
        (mult:SI
-        (zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
+        (zero_extend:SI (match_operand:HI 1 "register_operand" "%0"))
         (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!mulu.w %2,%0"
@@ -2484,7 +2484,7 @@
 (define_insn "umulqihi3"
   [(set (match_operand:HI 0 "register_operand" "=r")
        (mult:HI
-        (zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
+        (zero_extend:HI (match_operand:QI 1 "register_operand" "%0"))
         (zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!mulu.b %2,%0"
@@ -2503,7 +2503,7 @@
 
 (define_insn "mulsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
-       (mult:SI (match_operand:SI 1 "register_operand" "0")
+       (mult:SI (match_operand:SI 1 "register_operand" "%0")
                 (match_operand:SI 2 "register_operand" "r")))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.d %2,%0"
@@ -2521,7 +2521,7 @@
 (define_insn "mulqihi3"
   [(set (match_operand:HI 0 "register_operand" "=r")
        (mult:HI
-        (sign_extend:HI (match_operand:QI 1 "register_operand" "0"))
+        (sign_extend:HI (match_operand:QI 1 "register_operand" "%0"))
         (sign_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.b %2,%0"
@@ -2534,7 +2534,7 @@
 (define_insn "mulhisi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
        (mult:SI
-        (sign_extend:SI (match_operand:HI 1 "register_operand" "0"))
+        (sign_extend:SI (match_operand:HI 1 "register_operand" "%0"))
         (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.w %2,%0"
@@ -2554,7 +2554,7 @@
 (define_insn "mulsidi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (mult:DI
-        (sign_extend:DI (match_operand:SI 1 "register_operand" "0"))
+        (sign_extend:DI (match_operand:SI 1 "register_operand" "%0"))
         (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!muls.d %2,%M0\;move $mof,%H0")
@@ -2562,7 +2562,7 @@
 (define_insn "umulsidi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (mult:DI
-        (zero_extend:DI (match_operand:SI 1 "register_operand" "0"))
+        (zero_extend:DI (match_operand:SI 1 "register_operand" "%0"))
         (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
   "TARGET_HAS_MUL_INSNS"
   "%!mulu.d %2,%M0\;move $mof,%H0")