nvc0: properly align NVE4_COMPUTE_MP_TEMP_SIZE

MP_TEMP_SIZE must be aligned to 0x8000, while TEMP_SIZE on NVE4_3D
must be aligned to 0x20000, so perform both alignments to be sure
we allocate enough space (actually the bo will most likely use 128
KiB pages and not aligning to that would be a waste anyway).

Cc: "9.2" mesa-stable@lists.freedesktop.org

diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c
index 201d12fd3df7fef930ff55d4b717765e656124c8..171a30256a415db406b3af78340e71c4c3aa07b7 100644 (file)
--- a/src/gallium/drivers/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nvc0/nvc0_screen.c
@@ -512,6 +512,7 @@ nvc0_screen_resize_tls_area(struct nvc0_screen *screen,
    }
 
    size *= (screen->base.device->chipset >= 0xe0) ? 64 : 48; /* max warps */
+   size  = align(size, 0x8000);
    size *= screen->mp_count;
 
    size = align(size, 1 << 17);

diff --git a/src/gallium/drivers/nvc0/nve4_compute.c b/src/gallium/drivers/nvc0/nve4_compute.c
index 258564bf1c45c816fdc57028a91b44fb5ec51e98..abadd601a6881385ce4f9bf653adf021b968a523 100644 (file)
--- a/src/gallium/drivers/nvc0/nve4_compute.c
+++ b/src/gallium/drivers/nvc0/nve4_compute.c
@@ -78,11 +78,11 @@ nve4_screen_compute_setup(struct nvc0_screen *screen,
     */
    BEGIN_NVC0(push, NVE4_COMPUTE(MP_TEMP_SIZE_HIGH(0)), 3);
    PUSH_DATAh(push, screen->tls->size / screen->mp_count);
-   PUSH_DATA (push, screen->tls->size / screen->mp_count);
+   PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff);
    PUSH_DATA (push, 0xff);
    BEGIN_NVC0(push, NVE4_COMPUTE(MP_TEMP_SIZE_HIGH(1)), 3);
    PUSH_DATAh(push, screen->tls->size / screen->mp_count);
-   PUSH_DATA (push, screen->tls->size / screen->mp_count);
+   PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff);
    PUSH_DATA (push, 0xff);
 
    /* Unified address space ? Who needs that ? Certainly not OpenCL.