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fix bug in sv template where FRS2 was checking rs3
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sat, 29 Sep 2018 11:16:00 +0000
(12:16 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sat, 29 Sep 2018 11:16:00 +0000
(12:16 +0100)
riscv/insn_template_sv.cc
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diff --git
a/riscv/insn_template_sv.cc
b/riscv/insn_template_sv.cc
index 83c9b441cdd9d95b6d8ffe5acaa33c49ca98fb1a..9533e8395680eaebac03ad3b2ea9b44b5156c761 100644
(file)
--- a/
riscv/insn_template_sv.cc
+++ b/
riscv/insn_template_sv.cc
@@
-58,7
+58,7
@@
reg_t FN(processor_t* p, insn_t s_insn, reg_t pc)
#ifdef USING_REG_FRS2
insn.sv_check_reg(false, s_insn.rs2()) |
#endif
-#ifdef USING_REG_FRS
2
+#ifdef USING_REG_FRS
3
insn.sv_check_reg(false, s_insn.rs3()) |
#endif
#ifdef USING_REG_RVC_FRS2