Because of functional requirements for Gen11, when perf is enabled we
only power half the EU array.
This change forces it to enable everything.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
properties[p++] = DRM_I915_PERF_PROP_HOLD_PREEMPTION;
properties[p++] = true;
+ /* If global SSEU is available, pin it to the default. This will ensure on
+ * Gen11 for instance we use the full EU array. Initially when perf was
+ * enabled we would use only half on Gen11 because of functional
+ * requirements.
+ */
+ if (device->physical->perf->i915_perf_version >= 4) {
+ properties[p++] = DRM_I915_PERF_PROP_GLOBAL_SSEU;
+ properties[p++] = (uintptr_t) &device->physical->perf->sseu;
+ }
+
memset(¶m, 0, sizeof(param));
param.flags = 0;
param.flags |= I915_PERF_FLAG_FD_CLOEXEC | I915_PERF_FLAG_FD_NONBLOCK;