i965/vs/gen7: Allow MATH instructions to have MRF as a destination

total instructions in shared programs: 346873 -> 346847 (-0.01%)
instructions in affected programs:     364 -> 338 (-7.14%)

(All affected shaders are from Lightsmark)

Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index d5b7cb76f6f01465bece0ca28914dc0e02fbd750..70f6b9d37f5392000d60d0256ae8e89b1febf18c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -753,7 +753,7 @@ vec4_visitor::opt_register_coalesce()
                if (scan_inst->mlen)
                   break;
 
-               if (intel->gen >= 6) {
+               if (intel->gen == 6) {
                   /* gen6 math instructions must have the destination be
                    * GRF, so no compute-to-MRF for them.
                    */