radeonsi: move si_shader_context::soa::addr to si_shader_context

The plan is to replace si_shader_context::soa with its parent
structure (ie. bld_base).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 61c0eff1526d8400e67d403ebf05c5fc893238ba..9e4a22fb2e954e88f0af3f1e021a5e967f58ec5b 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -511,7 +511,7 @@ static LLVMValueRef get_indirect_index(struct si_shader_context *ctx,
        struct gallivm_state *gallivm = ctx->soa.bld_base.base.gallivm;
        LLVMValueRef result;
 
-       result = ctx->soa.addr[ind->Index][ind->Swizzle];
+       result = ctx->addrs[ind->Index][ind->Swizzle];
        result = LLVMBuildLoad(gallivm->builder, result, "");
        result = LLVMBuildAdd(gallivm->builder, result,
                              lp_build_const_int32(gallivm, rel_index), "");
@@ -1863,7 +1863,7 @@ static LLVMValueRef fetch_constant(
                bufp = load_const_buffer_desc(ctx, buf);
 
        if (reg->Register.Indirect) {
-               addr = ctx->soa.addr[ireg->Index][ireg->Swizzle];
+               addr = ctx->addrs[ireg->Index][ireg->Swizzle];
                addr = LLVMBuildLoad(base->gallivm->builder, addr, "load addr reg");
                addr = lp_build_mul_imm(&bld_base->uint_bld, addr, 16);
                addr = lp_build_add(&bld_base->uint_bld, addr,

diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index 430c1101d5adf51e4a5ac693bcb1c74b1d52af3a..1d1349d862060de441bbc25e9eae40e68bcbbdc7 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -43,6 +43,7 @@ struct radeon_shader_binary;
 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
 
 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4
+#define RADEON_LLVM_MAX_ADDRS 16
 
 struct si_llvm_flow;
 
@@ -80,6 +81,7 @@ struct si_shader_context {
        struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
        LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
        LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
+       LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
 
        /** This pointer is used to contain the temporary values.
          * The amount of temporary used in tgsi can't be bound to a max value and

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index d86b460272bd484b8976914d7855f4164446c0e8..12f465e741a6f2c24eeb8aea7e9d66eb77488983 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -419,16 +419,16 @@ get_array_range(struct lp_build_tgsi_context *bld_base,
 }
 
 static LLVMValueRef
-emit_array_index(struct lp_build_tgsi_soa_context *bld,
+emit_array_index(struct si_shader_context *ctx,
                 const struct tgsi_ind_register *reg,
                 unsigned offset)
 {
-       struct gallivm_state *gallivm = bld->bld_base.base.gallivm;
+       struct gallivm_state *gallivm = ctx->soa.bld_base.base.gallivm;
 
        if (!reg) {
                return lp_build_const_int32(gallivm, offset);
        }
-       LLVMValueRef addr = LLVMBuildLoad(gallivm->builder, bld->addr[reg->Index][reg->Swizzle], "");
+       LLVMValueRef addr = LLVMBuildLoad(gallivm->builder, ctx->addrs[reg->Index][reg->Swizzle], "");
        return LLVMBuildAdd(gallivm->builder, addr, lp_build_const_int32(gallivm, offset), "");
 }
 
@@ -470,7 +470,7 @@ get_pointer_into_array(struct si_shader_context *ctx,
        if (!(array->writemask & (1 << swizzle)))
                return ctx->undef_alloca;
 
-       index = emit_array_index(&ctx->soa, reg_indirect,
+       index = emit_array_index(ctx, reg_indirect,
                                 reg_index - ctx->temp_arrays[array_id - 1].range.First);
 
        /* Ensure that the index is within a valid range, to guard against
@@ -559,7 +559,6 @@ load_value_from_array(struct lp_build_tgsi_context *bld_base,
                      const struct tgsi_ind_register *reg_indirect)
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
-       struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base);
        struct gallivm_state *gallivm = bld_base->base.gallivm;
        LLVMBuilderRef builder = gallivm->builder;
        LLVMValueRef ptr;
@@ -579,7 +578,7 @@ load_value_from_array(struct lp_build_tgsi_context *bld_base,
                struct tgsi_declaration_range range =
                        get_array_range(bld_base, file, reg_index, reg_indirect);
                LLVMValueRef index =
-                       emit_array_index(bld, reg_indirect, reg_index - range.First);
+                       emit_array_index(ctx, reg_indirect, reg_index - range.First);
                LLVMValueRef array =
                        emit_array_fetch(bld_base, file, type, range, swizzle);
                return LLVMBuildExtractElement(builder, array, index, "");
@@ -606,7 +605,7 @@ store_value_to_array(struct lp_build_tgsi_context *bld_base,
        } else {
                unsigned i, size;
                struct tgsi_declaration_range range = get_array_range(bld_base, file, reg_index, reg_indirect);
-               LLVMValueRef index = emit_array_index(bld, reg_indirect, reg_index - range.First);
+               LLVMValueRef index = emit_array_index(ctx, reg_indirect, reg_index - range.First);
                LLVMValueRef array =
                        emit_array_fetch(bld_base, file, TGSI_TYPE_FLOAT, range, chan_index);
                LLVMValueRef temp_ptr;
@@ -773,7 +772,7 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
                for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) {
                        unsigned chan;
                        for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
-                                ctx->soa.addr[idx][chan] = lp_build_alloca_undef(
+                                ctx->addrs[idx][chan] = lp_build_alloca_undef(
                                        &ctx->gallivm,
                                        ctx->soa.bld_base.uint_bld.elem_type, "");
                        }
@@ -995,7 +994,7 @@ void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
                        value = si_llvm_saturate(bld_base, value);
 
                if (reg->Register.File == TGSI_FILE_ADDRESS) {
-                       temp_ptr = bld->addr[reg->Register.Index][chan_index];
+                       temp_ptr = ctx->addrs[reg->Register.Index][chan_index];
                        LLVMBuildStore(builder, value, temp_ptr);
                        continue;
                }