SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the
buffer. This is also true for the SoftFPA model. However, for the FPA
model the PC is at offset 21 in the buffer. */
-#define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
+#define ARM_LINUX_JB_ELEMENT_SIZE ARM_INT_REGISTER_SIZE
#define ARM_LINUX_JB_PC_FPA 21
#define ARM_LINUX_JB_PC_EABI 9
/* Core file and register set support. */
-#define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE)
+#define ARM_LINUX_SIZEOF_GREGSET (18 * ARM_INT_REGISTER_SIZE)
void
arm_linux_supply_gregset (const struct regset *regset,
const gdb_byte *gregs = (const gdb_byte *) gregs_buf;
int regno;
CORE_ADDR reg_pc;
- gdb_byte pc_buf[INT_REGISTER_SIZE];
+ gdb_byte pc_buf[ARM_INT_REGISTER_SIZE];
for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
if (regnum == -1 || regnum == regno)
- regcache->raw_supply (regno, gregs + INT_REGISTER_SIZE * regno);
+ regcache->raw_supply (regno, gregs + ARM_INT_REGISTER_SIZE * regno);
if (regnum == ARM_PS_REGNUM || regnum == -1)
{
if (arm_apcs_32)
regcache->raw_supply (ARM_PS_REGNUM,
- gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
+ gregs + ARM_INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
else
regcache->raw_supply (ARM_PS_REGNUM,
- gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
+ gregs + ARM_INT_REGISTER_SIZE * ARM_PC_REGNUM);
}
if (regnum == ARM_PC_REGNUM || regnum == -1)
{
- reg_pc = extract_unsigned_integer (gregs
- + INT_REGISTER_SIZE * ARM_PC_REGNUM,
- INT_REGISTER_SIZE, byte_order);
+ reg_pc = extract_unsigned_integer (
+ gregs + ARM_INT_REGISTER_SIZE * ARM_PC_REGNUM,
+ ARM_INT_REGISTER_SIZE, byte_order);
reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
- store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc);
+ store_unsigned_integer (pc_buf, ARM_INT_REGISTER_SIZE, byte_order,
+ reg_pc);
regcache->raw_supply (ARM_PC_REGNUM, pc_buf);
}
}
for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
if (regnum == -1 || regnum == regno)
regcache->raw_collect (regno,
- gregs + INT_REGISTER_SIZE * regno);
+ gregs + ARM_INT_REGISTER_SIZE * regno);
if (regnum == ARM_PS_REGNUM || regnum == -1)
{
if (arm_apcs_32)
regcache->raw_collect (ARM_PS_REGNUM,
- gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
+ gregs + ARM_INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
else
regcache->raw_collect (ARM_PS_REGNUM,
- gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
+ gregs + ARM_INT_REGISTER_SIZE * ARM_PC_REGNUM);
}
if (regnum == ARM_PC_REGNUM || regnum == -1)
regcache->raw_collect (ARM_PC_REGNUM,
- gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
+ gregs + ARM_INT_REGISTER_SIZE * ARM_PC_REGNUM);
}
/* Support for register format used by the NWFPE FPA emulator. */
{
const gdb_byte *reg_data;
gdb_byte reg_tag;
- gdb_byte buf[FP_REGISTER_SIZE];
+ gdb_byte buf[ARM_FP_REGISTER_SIZE];
- reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
+ reg_data = regs + (regno - ARM_F0_REGNUM) * ARM_FP_REGISTER_SIZE;
reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
- memset (buf, 0, FP_REGISTER_SIZE);
+ memset (buf, 0, ARM_FP_REGISTER_SIZE);
switch (reg_tag)
{
{
gdb_byte *reg_data;
gdb_byte reg_tag;
- gdb_byte buf[FP_REGISTER_SIZE];
+ gdb_byte buf[ARM_FP_REGISTER_SIZE];
regcache->raw_collect (regno, buf);
from the native file to the target file. But this doesn't
always make sense. */
- reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
+ reg_data = regs + (regno - ARM_F0_REGNUM) * ARM_FP_REGISTER_SIZE;
reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
switch (reg_tag)
if (regnum == ARM_FPS_REGNUM || regnum == -1)
regcache->raw_collect (ARM_FPS_REGNUM,
- regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM);
+ regs + ARM_INT_REGISTER_SIZE * ARM_FPS_REGNUM);
}
/* Support VFP register format. */
align = type_align (arg_type);
/* Round alignment up to a whole number of words. */
- align = (align + INT_REGISTER_SIZE - 1) & ~(INT_REGISTER_SIZE - 1);
+ align = (align + ARM_INT_REGISTER_SIZE - 1)
+ & ~(ARM_INT_REGISTER_SIZE - 1);
/* Different ABIs have different maximum alignments. */
if (gdbarch_tdep (gdbarch)->arm_abi == ARM_ABI_APCS)
{
/* The APCS ABI only requires word alignment. */
- align = INT_REGISTER_SIZE;
+ align = ARM_INT_REGISTER_SIZE;
}
else
{
/* The AAPCS requires at most doubleword alignment. */
- if (align > INT_REGISTER_SIZE * 2)
- align = INT_REGISTER_SIZE * 2;
+ if (align > ARM_INT_REGISTER_SIZE * 2)
+ align = ARM_INT_REGISTER_SIZE * 2;
}
if (use_vfp_abi
/* Push stack padding for dowubleword alignment. */
if (nstack & (align - 1))
{
- si = push_stack_item (si, val, INT_REGISTER_SIZE);
- nstack += INT_REGISTER_SIZE;
+ si = push_stack_item (si, val, ARM_INT_REGISTER_SIZE);
+ nstack += ARM_INT_REGISTER_SIZE;
}
/* Doubleword aligned quantities must go in even register pairs. */
if (may_use_core_reg
&& argreg <= ARM_LAST_ARG_REGNUM
- && align > INT_REGISTER_SIZE
+ && align > ARM_INT_REGISTER_SIZE
&& argreg & 1)
argreg++;
registers and stack. */
while (len > 0)
{
- int partial_len = len < INT_REGISTER_SIZE ? len : INT_REGISTER_SIZE;
+ int partial_len = len < ARM_INT_REGISTER_SIZE
+ ? len : ARM_INT_REGISTER_SIZE;
CORE_ADDR regval
= extract_unsigned_integer (val, partial_len, byte_order);
/* The argument is being passed in a general purpose
register. */
if (byte_order == BFD_ENDIAN_BIG)
- regval <<= (INT_REGISTER_SIZE - partial_len) * 8;
+ regval <<= (ARM_INT_REGISTER_SIZE - partial_len) * 8;
if (arm_debug)
fprintf_unfiltered (gdb_stdlog, "arg %d in %s = 0x%s\n",
argnum,
gdbarch_register_name
(gdbarch, argreg),
- phex (regval, INT_REGISTER_SIZE));
+ phex (regval, ARM_INT_REGISTER_SIZE));
regcache_cooked_write_unsigned (regcache, argreg, regval);
argreg++;
}
else
{
- gdb_byte buf[INT_REGISTER_SIZE];
+ gdb_byte buf[ARM_INT_REGISTER_SIZE];
memset (buf, 0, sizeof (buf));
store_unsigned_integer (buf, partial_len, byte_order, regval);
if (arm_debug)
fprintf_unfiltered (gdb_stdlog, "arg %d @ sp + %d\n",
argnum, nstack);
- si = push_stack_item (si, buf, INT_REGISTER_SIZE);
- nstack += INT_REGISTER_SIZE;
+ si = push_stack_item (si, buf, ARM_INT_REGISTER_SIZE);
+ nstack += ARM_INT_REGISTER_SIZE;
}
len -= partial_len;
/* The value is in register F0 in internal format. We need to
extract the raw value and then convert it to the desired
internal type. */
- bfd_byte tmpbuf[FP_REGISTER_SIZE];
+ bfd_byte tmpbuf[ARM_FP_REGISTER_SIZE];
regs->cooked_read (ARM_F0_REGNUM, tmpbuf);
target_float_convert (tmpbuf, arm_ext_type (gdbarch),
case ARM_FLOAT_VFP:
regs->cooked_read (ARM_A1_REGNUM, valbuf);
if (TYPE_LENGTH (type) > 4)
- regs->cooked_read (ARM_A1_REGNUM + 1, valbuf + INT_REGISTER_SIZE);
+ regs->cooked_read (ARM_A1_REGNUM + 1,
+ valbuf + ARM_INT_REGISTER_SIZE);
break;
default:
anything special for small big-endian values. */
regcache_cooked_read_unsigned (regs, regno++, &tmp);
store_unsigned_integer (valbuf,
- (len > INT_REGISTER_SIZE
- ? INT_REGISTER_SIZE : len),
+ (len > ARM_INT_REGISTER_SIZE
+ ? ARM_INT_REGISTER_SIZE : len),
byte_order, tmp);
- len -= INT_REGISTER_SIZE;
- valbuf += INT_REGISTER_SIZE;
+ len -= ARM_INT_REGISTER_SIZE;
+ valbuf += ARM_INT_REGISTER_SIZE;
}
}
else
registers with 32-bit load instruction(s). */
int len = TYPE_LENGTH (type);
int regno = ARM_A1_REGNUM;
- bfd_byte tmpbuf[INT_REGISTER_SIZE];
+ bfd_byte tmpbuf[ARM_INT_REGISTER_SIZE];
while (len > 0)
{
regs->cooked_read (regno++, tmpbuf);
memcpy (valbuf, tmpbuf,
- len > INT_REGISTER_SIZE ? INT_REGISTER_SIZE : len);
- len -= INT_REGISTER_SIZE;
- valbuf += INT_REGISTER_SIZE;
+ len > ARM_INT_REGISTER_SIZE ? ARM_INT_REGISTER_SIZE : len);
+ len -= ARM_INT_REGISTER_SIZE;
+ valbuf += ARM_INT_REGISTER_SIZE;
}
}
}
{
/* The AAPCS says all aggregates not larger than a word are returned
in a register. */
- if (TYPE_LENGTH (type) <= INT_REGISTER_SIZE)
+ if (TYPE_LENGTH (type) <= ARM_INT_REGISTER_SIZE)
return 0;
return 1;
/* All aggregate types that won't fit in a register must be returned
in memory. */
- if (TYPE_LENGTH (type) > INT_REGISTER_SIZE)
+ if (TYPE_LENGTH (type) > ARM_INT_REGISTER_SIZE)
return 1;
/* In the ARM ABI, "integer" like aggregate types are returned in
registers. For an aggregate type to be integer like, its size
- must be less than or equal to INT_REGISTER_SIZE and the
+ must be less than or equal to ARM_INT_REGISTER_SIZE and the
offset of each addressable subfield must be zero. Note that bit
fields are not addressable, and all addressable subfields of
unions always start at offset zero.
int i;
/* Need to check if this struct/union is "integer" like. For
this to be true, its size must be less than or equal to
- INT_REGISTER_SIZE and the offset of each addressable
+ ARM_INT_REGISTER_SIZE and the offset of each addressable
subfield must be zero. Note that bit fields are not
addressable, and unions always start at offset zero. If any
of the subfields is a floating point type, the struct/union
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
- gdb_byte buf[FP_REGISTER_SIZE];
+ gdb_byte buf[ARM_FP_REGISTER_SIZE];
switch (gdbarch_tdep (gdbarch)->fp_model)
{
case ARM_FLOAT_VFP:
regs->cooked_write (ARM_A1_REGNUM, valbuf);
if (TYPE_LENGTH (type) > 4)
- regs->cooked_write (ARM_A1_REGNUM + 1, valbuf + INT_REGISTER_SIZE);
+ regs->cooked_write (ARM_A1_REGNUM + 1,
+ valbuf + ARM_INT_REGISTER_SIZE);
break;
default:
{
/* Values of one word or less are zero/sign-extended and
returned in r0. */
- bfd_byte tmpbuf[INT_REGISTER_SIZE];
+ bfd_byte tmpbuf[ARM_INT_REGISTER_SIZE];
LONGEST val = unpack_long (type, valbuf);
- store_signed_integer (tmpbuf, INT_REGISTER_SIZE, byte_order, val);
+ store_signed_integer (tmpbuf, ARM_INT_REGISTER_SIZE, byte_order, val);
regs->cooked_write (ARM_A1_REGNUM, tmpbuf);
}
else
while (len > 0)
{
regs->cooked_write (regno++, valbuf);
- len -= INT_REGISTER_SIZE;
- valbuf += INT_REGISTER_SIZE;
+ len -= ARM_INT_REGISTER_SIZE;
+ valbuf += ARM_INT_REGISTER_SIZE;
}
}
}
registers with 32-bit load instruction(s). */
int len = TYPE_LENGTH (type);
int regno = ARM_A1_REGNUM;
- bfd_byte tmpbuf[INT_REGISTER_SIZE];
+ bfd_byte tmpbuf[ARM_INT_REGISTER_SIZE];
while (len > 0)
{
memcpy (tmpbuf, valbuf,
- len > INT_REGISTER_SIZE ? INT_REGISTER_SIZE : len);
+ len > ARM_INT_REGISTER_SIZE ? ARM_INT_REGISTER_SIZE : len);
regs->cooked_write (regno++, tmpbuf);
- len -= INT_REGISTER_SIZE;
- valbuf += INT_REGISTER_SIZE;
+ len -= ARM_INT_REGISTER_SIZE;
+ valbuf += ARM_INT_REGISTER_SIZE;
}
}
}
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR jb_addr;
- gdb_byte buf[INT_REGISTER_SIZE];
+ gdb_byte buf[ARM_INT_REGISTER_SIZE];
jb_addr = get_frame_register_unsigned (frame, ARM_A1_REGNUM);
if (target_read_memory (jb_addr + tdep->jb_pc * tdep->jb_elt_size, buf,
- INT_REGISTER_SIZE))
+ ARM_INT_REGISTER_SIZE))
return 0;
- *pc = extract_unsigned_integer (buf, INT_REGISTER_SIZE, byte_order);
+ *pc = extract_unsigned_integer (buf, ARM_INT_REGISTER_SIZE, byte_order);
return 1;
}
same as the FPA layout. */
register_remote_g_packet_guess (gdbarch,
/* r0-r12,sp,lr,pc; f0-f7; fps,xpsr */
- (16 * INT_REGISTER_SIZE)
- + (8 * FP_REGISTER_SIZE)
- + (2 * INT_REGISTER_SIZE),
+ (16 * ARM_INT_REGISTER_SIZE)
+ + (8 * ARM_FP_REGISTER_SIZE)
+ + (2 * ARM_INT_REGISTER_SIZE),
tdesc_arm_with_m_fpa_layout);
/* The regular M-profile layout. */
register_remote_g_packet_guess (gdbarch,
/* r0-r12,sp,lr,pc; xpsr */
- (16 * INT_REGISTER_SIZE)
- + INT_REGISTER_SIZE,
+ (16 * ARM_INT_REGISTER_SIZE)
+ + ARM_INT_REGISTER_SIZE,
tdesc_arm_with_m);
/* M-profile plus M4F VFP. */
register_remote_g_packet_guess (gdbarch,
/* r0-r12,sp,lr,pc; d0-d15; fpscr,xpsr */
- (16 * INT_REGISTER_SIZE)
- + (16 * VFP_REGISTER_SIZE)
- + (2 * INT_REGISTER_SIZE),
+ (16 * ARM_INT_REGISTER_SIZE)
+ + (16 * ARM_VFP_REGISTER_SIZE)
+ + (2 * ARM_INT_REGISTER_SIZE),
tdesc_arm_with_m_vfp_d16);
}
/* STMDA (STMED): Decrement after. */
case 0:
record_buf_mem[1] = (uint32_t) u_regval
- - register_count * INT_REGISTER_SIZE + 4;
+ - register_count * ARM_INT_REGISTER_SIZE + 4;
break;
/* STM (STMIA, STMEA): Increment after. */
case 1:
/* STMDB (STMFD): Decrement before. */
case 2:
record_buf_mem[1] = (uint32_t) u_regval
- - register_count * INT_REGISTER_SIZE;
+ - register_count * ARM_INT_REGISTER_SIZE;
break;
/* STMIB (STMFA): Increment before. */
case 3:
- record_buf_mem[1] = (uint32_t) u_regval + INT_REGISTER_SIZE;
+ record_buf_mem[1] = (uint32_t) u_regval + ARM_INT_REGISTER_SIZE;
break;
default:
gdb_assert_not_reached ("no decoding pattern found");
break;
}
- record_buf_mem[0] = register_count * INT_REGISTER_SIZE;
+ record_buf_mem[0] = register_count * ARM_INT_REGISTER_SIZE;
arm_insn_r->mem_rec_count = 1;
/* If wback is true, also save the base register, which is going to be
projects / binutils-gdb.git / commitdiff