gdb/

	  Fix size of FPSCR in Power 7 processors.
	* ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define.
	(PPC_FEATURE_HAS_DFP): New #define.
	(ppc_linux_read_description): Check for DFP feature instead of
	ISA 2.05 to decide on size of the FPSCR.

gdbserver/
	Fix size of FPSCR in Power 7 processors.
	* linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define.
	(PPC_FEATURE_HAS_DFP): New #define.
	(ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on
	size of the FPSCR.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index c3e04828a3793085e0bf64f1f3afc93c6ab6ca37..9086bbefd348884c02071facaae0c3b5f268a54f 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,11 @@
+2009-03-25  Thiago Jung Bauermann  <bauerman@br.ibm.com>
+
+       Fix size of FPSCR in Power 7 processors.
+       * ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define.
+       (PPC_FEATURE_HAS_DFP): New #define.
+       (ppc_linux_read_description): Check for DFP feature instead of
+       ISA 2.05 to decide on size of the FPSCR.
+
 2009-03-25  Kevin Buettner  <kevinb@redhat.com>
 
        * mn10300-tdep.c (trad-frame.h): Don't include.

diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog
index 964ab079726766f0f742225f2a5fc1c49a58de81..68ad1a54a9d97c56650e29567afea28c71aab324 100644 (file)
--- a/gdb/gdbserver/ChangeLog
+++ b/gdb/gdbserver/ChangeLog
@@ -1,3 +1,11 @@
+2009-03-25  Thiago Jung Bauermann  <bauerman@br.ibm.com>
+
+       Fix size of FPSCR in Power 7 processors.
+       * linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define.
+       (PPC_FEATURE_HAS_DFP): New #define.
+       (ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on
+       size of the FPSCR.
+
 2009-03-23  Pedro Alves  <pedro@codesourcery.com>
 
        * server.c (handle_query) Whitespace and formatting.

diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
index b184d5c542991e7ad2af51ea76242cdc0354cd6e..06adbd3914e1a38eed0da3fd19c6f36f72091447 100644 (file)
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -28,7 +28,7 @@
 #define PPC_FEATURE_HAS_VSX            0x00000080
 #define PPC_FEATURE_HAS_ALTIVEC         0x10000000
 #define PPC_FEATURE_HAS_SPE             0x00800000
-#define PPC_FEATURE_ARCH_2_05           0x00001000
+#define PPC_FEATURE_HAS_DFP             0x00000400
 
 static unsigned long ppc_hwcap;
 
@@ -274,14 +274,21 @@ ppc_arch_setup (void)
       ppc_get_hwcap (&ppc_hwcap);
       if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
        {
-         if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+         /* Power ISA 2.05 (implemented by Power 6 and newer processors)
+            increases the FPSCR from 32 bits to 64 bits. Even though Power 7
+            supports this ISA version, it doesn't have PPC_FEATURE_ARCH_2_05
+            set, only PPC_FEATURE_ARCH_2_06.  Since for now the only bits
+            used in the higher half of the register are for Decimal Floating
+            Point, we check if that feature is available to decide the size
+            of the FPSCR.  */
+         if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
            init_registers_powerpc_isa205_vsx64l ();
          else
            init_registers_powerpc_vsx64l ();
        }
       else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
        {
-         if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+         if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
            init_registers_powerpc_isa205_altivec64l ();
          else
            init_registers_powerpc_altivec64l ();
@@ -297,14 +304,14 @@ ppc_arch_setup (void)
   ppc_get_hwcap (&ppc_hwcap);
   if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
     {
-      if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+      if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
        init_registers_powerpc_isa205_vsx32l ();
       else
        init_registers_powerpc_vsx32l ();
     }
   else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
     {
-      if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+      if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
        init_registers_powerpc_isa205_altivec32l ();
       else
        init_registers_powerpc_altivec32l ();

diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index 034201b5f1673a5a411f9219be22d485962cd1fe..b7e70d17c12897f3408b6ab71b0fb50f119f0876 100644 (file)
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -63,8 +63,8 @@
 #ifndef PPC_FEATURE_BOOKE
 #define PPC_FEATURE_BOOKE 0x00008000
 #endif
-#ifndef PPC_FEATURE_ARCH_2_05
-#define PPC_FEATURE_ARCH_2_05  0x00001000 /* ISA 2.05 */
+#ifndef PPC_FEATURE_HAS_DFP
+#define PPC_FEATURE_HAS_DFP    0x00000400  /* Decimal Floating Point.  */
 #endif
 
 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
@@ -1290,7 +1290,13 @@ ppc_linux_read_description (struct target_ops *ops)
        perror_with_name (_("Unable to fetch AltiVec registers"));
     }
 
-  if (ppc_linux_get_hwcap () & PPC_FEATURE_ARCH_2_05)
+  /* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
+     the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
+     ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
+     PPC_FEATURE_ARCH_2_06.  Since for now the only bits used in the higher
+     half of the register are for Decimal Floating Point, we check if that
+     feature is available to decide the size of the FPSCR.  */
+  if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
     isa205 = 1;
 
   /* Check for 64-bit inferior process.  This is the case when the host is