gallium: remove PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
authorMarek Olšák <maraeo@gmail.com>
Mon, 14 Jan 2013 05:58:52 +0000 (06:58 +0100)
committerMarek Olšák <maraeo@gmail.com>
Tue, 15 Jan 2013 15:47:18 +0000 (16:47 +0100)
Reviewed-by: Brian Paul <brianp@vmware.com>
13 files changed:
src/gallium/docs/source/context.rst
src/gallium/docs/source/screen.rst
src/gallium/drivers/i915/i915_screen.c
src/gallium/drivers/llvmpipe/lp_screen.c
src/gallium/drivers/nv30/nv30_screen.c
src/gallium/drivers/nv50/nv50_screen.c
src/gallium/drivers/nvc0/nvc0_screen.c
src/gallium/drivers/r300/r300_screen.c
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/radeonsi/radeonsi_pipe.c
src/gallium/drivers/softpipe/sp_screen.c
src/gallium/drivers/svga/svga_screen.c
src/gallium/include/pipe/p_defines.h

index ad678adc7252754e7b2ecbfd8786cd53ea4abdd1..3ddf1ea3fd71e90c8681ef73711f7f3e70fb9d3d 100644 (file)
@@ -207,8 +207,7 @@ the framebuffer to particular RGBA, depth, or stencil values.
 Currently, this does not take into account color or stencil write masks (as
 used by GL), and always clears the whole surfaces (no scissoring as used by
 GL clear or explicit rectangles like d3d9 uses). It can, however, also clear
-only depth or stencil in a combined depth/stencil surface, if the driver
-supports PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE.
+only depth or stencil in a combined depth/stencil surface.
 If a surface includes several layers then all layers will be cleared.
 
 ``clear_render_target`` clears a single color rendertarget with the specified
index f4750e531d0b967d12d368df17725d9fc490b75c..7a17f69dbfd7562277a0fa95272d3c6a1f5175b0 100644 (file)
@@ -61,8 +61,6 @@ The integer capabilities:
 * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
   available. If 0, then the first rendertarget's blend functions affect all
   MRTs.
-* ``PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE``: Whether clearing only depth or only
-  stencil in a combined depth-stencil buffer is supported.
 * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
   layers supported. If 0, the array textures are not supported at all and
   the ARRAY texture targets are invalid.
index 6f66f497b225ca6aab6c9cbd59f911ebe5385a4b..430987e2cd7620ac9981e28b5ca70544d1c3093e 100644 (file)
@@ -170,7 +170,6 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
    switch (cap) {
    /* Supported features (boolean caps). */
    case PIPE_CAP_ANISOTROPIC_FILTER:
-   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
    case PIPE_CAP_NPOT_TEXTURES:
    case PIPE_CAP_POINT_SPRITE:
    case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
index b99e617e98cc7130fdca867e46ff3cf80f44a1c5..450a896b0972cc85a84c5103af419c63acb14b7a 100644 (file)
@@ -158,8 +158,6 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return 0;
    case PIPE_CAP_PRIMITIVE_RESTART:
       return 1;
-   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
-      return 1;
    case PIPE_CAP_DEPTH_CLIP_DISABLE:
       return 0;
    case PIPE_CAP_SHADER_STENCIL_EXPORT:
index 53dad0aab3167e040693b6f77e9f64a6a3763fb6..06f7c42bbe5320c9165770b07613fe91f6cc091c 100644 (file)
@@ -74,7 +74,6 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_QUERY_TIMESTAMP:
    case PIPE_CAP_TEXTURE_SHADOW_MAP:
    case PIPE_CAP_TEXTURE_SWIZZLE:
-   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
    case PIPE_CAP_DEPTH_CLIP_DISABLE:
    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
index b6e53f6fdea09582f649f620a8675a61bbbde039..1155c93e8f4316c1fd97dadbd549f0fe98899e8c 100644 (file)
@@ -118,7 +118,6 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
       */
    case PIPE_CAP_TWO_SIDED_STENCIL:
    case PIPE_CAP_DEPTH_CLIP_DISABLE:
-   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
    case PIPE_CAP_POINT_SPRITE:
       return 1;
    case PIPE_CAP_SM3:
index d116be9dc463f303ca6cf4457689100f8a5268b6..d491bd3cfd921f4bee9b81c0a5fb0acf17d6b5b0 100644 (file)
@@ -94,7 +94,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
       return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
    case PIPE_CAP_TWO_SIDED_STENCIL:
    case PIPE_CAP_DEPTH_CLIP_DISABLE:
-   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
    case PIPE_CAP_POINT_SPRITE:
       return 1;
    case PIPE_CAP_SM3:
index 8e479532fdd04c90c04d1e0e05d5c7c47b46f4c2..3af5774ea513c1bf22ccc3d1adc4c0239ea179ce 100644 (file)
@@ -97,7 +97,6 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
-        case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
         case PIPE_CAP_CONDITIONAL_RENDER:
index 92beabc74d0a3a4f770ceda7e29b1546e925a72c..fda507454cc7d00f05e45ab95b68f68bd0a4621e 100644 (file)
@@ -393,7 +393,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
        case PIPE_CAP_BLEND_EQUATION_SEPARATE:
        case PIPE_CAP_TEXTURE_SWIZZLE:
-       case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
        case PIPE_CAP_DEPTH_CLIP_DISABLE:
        case PIPE_CAP_SHADER_STENCIL_EXPORT:
        case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
index d66e30f9995f647623066f596c2f8838a5e40cd0..cbb3bc488556ba0310f6bcb76bc46307a6d87689 100644 (file)
@@ -303,7 +303,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
        case PIPE_CAP_BLEND_EQUATION_SEPARATE:
        case PIPE_CAP_TEXTURE_SWIZZLE:
-       case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
        case PIPE_CAP_DEPTH_CLIP_DISABLE:
        case PIPE_CAP_SHADER_STENCIL_EXPORT:
        case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
index 198eb0fbc5a848da7b426f0d909c062e3f453b98..af40261945f688c74bd0e7b0df9a1b9b138e1cf9 100644 (file)
@@ -118,8 +118,6 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return 16*4;
    case PIPE_CAP_PRIMITIVE_RESTART:
       return 1;
-   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
-      return 0;
    case PIPE_CAP_SHADER_STENCIL_EXPORT:
       return 1;
    case PIPE_CAP_TGSI_INSTANCEID:
index fdd78162922c2185ce12e72b8e0457581e88b28b..c6f034382186668089b7e0bd5bac7fa1221564e8 100644 (file)
@@ -209,9 +209,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
       return 0;
 
-   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
-      return 1;
-
    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
       return 1; /* The color outputs of vertex shaders are not clamped */
    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
index 4a0594fc1df6758d16410c85a5cf2b86dd09999c..bd08ac0895a7cea33509ae3483373595cc138d2c 100644 (file)
@@ -457,7 +457,6 @@ enum pipe_cap {
    PIPE_CAP_INDEP_BLEND_ENABLE = 33,
    /** different blend funcs per rendertarget */
    PIPE_CAP_INDEP_BLEND_FUNC = 34,
-   PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE = 35,
    PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS = 36,
    PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT = 37,
    PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT = 38,