+2018-04-09 Tom de Vries <tom@codesourcery.com>
+
+ PR target/84041
+ * config/nvptx/nvptx.md (define_c_enum "unspecv"): Add UNSPECV_MEMBAR.
+ (define_expand "*memory_barrier"): New define_expand.
+ (define_insn "memory_barrier"): New insn.
+
2018-04-09 Andrey Belevantsev <abel@ispras.ru>
PR rtl-optimization/80463
UNSPECV_CAS
UNSPECV_XCHG
UNSPECV_BARSYNC
+ UNSPECV_MEMBAR
UNSPECV_DIM_POS
UNSPECV_FORK
"\\tbar.sync\\t%0;"
[(set_attr "predicable" "false")])
+(define_expand "memory_barrier"
+ [(set (match_dup 0)
+ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMBAR))]
+ ""
+{
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+ MEM_VOLATILE_P (operands[0]) = 1;
+})
+
+;; Ptx defines the memory barriers membar.cta, membar.gl and membar.sys
+;; (corresponding to cuda functions threadfence_block, threadfence and
+;; threadfence_system). For the insn memory_barrier we use membar.sys. This
+;; may be overconservative, but before using membar.gl instead we'll need to
+;; explain in detail why it's safe to use. For now, use membar.sys.
+(define_insn "*memory_barrier"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMBAR))]
+ ""
+ "\\tmembar.sys;"
+ [(set_attr "predicable" "false")])
+
(define_insn "nvptx_nounroll"
[(unspec_volatile [(const_int 0)] UNSPECV_NOUNROLL)]
""