m32c.c (m32c_emit_epilogue): Don't try to push registers if we already know there...

* config/m32c/m32c.c (m32c_emit_epilogue): Don't try to push
registers if we already know there aren't any.
(m32c_emit_epilogue): Don't emit a barrier here.
(m32c_emit_eh_epilogue): Likewise.
* config/m32c/blkmov.md (movstr): Don't fail on wrong-type
operands at expand time.
* config/m32c/m32c.h (WCHAR_TYPE_SIZE): Change to 4 to match "long
int" wchar type.
(REG_CLASS_CONTENTS, reg_class, REG_CLASS_NAMES): Remove
duplicates.  Provide aliases instead.
* config/m32c/prologue.md (eh_return): Emit a barrier here.
(eh_epilogue): Add a "(return)" here as a hint to other parts of
the compiler.

From-SVN: r172735

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c01f2ca8f6f99398e2d2f5a2d2fdbbe1eb141e75..660f6f1f1e51d502249173e8b4b59ec6bef54085 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+2011-04-19  DJ Delorie  <dj@redhat.com>
+
+       * config/m32c/m32c.c (m32c_emit_epilogue): Don't try to push
+       registers if we already know there aren't any.
+       (m32c_emit_epilogue): Don't emit a barrier here.
+       (m32c_emit_eh_epilogue): Likewise.
+       * config/m32c/blkmov.md (movstr): Don't fail on wrong-type
+       operands at expand time.
+       * config/m32c/m32c.h (WCHAR_TYPE_SIZE): Change to 4 to match "long
+       int" wchar type.
+       (REG_CLASS_CONTENTS, reg_class, REG_CLASS_NAMES): Remove
+       duplicates.  Provide aliases instead.
+       * config/m32c/prologue.md (eh_return): Emit a barrier here.
+       (eh_epilogue): Add a "(return)" here as a hint to other parts of
+       the compiler.
+
 2011-04-19  Anatoly Sokolov  <aesok@post.ru>
 
        * config/sparc/sparc.h (GENERAL_OR_I64, REGISTER_MOVE_COST): Remove.

diff --git a/gcc/config/m32c/blkmov.md b/gcc/config/m32c/blkmov.md
index e384d3c52b5fef069899120485294d6ae8d05ae7..a5345ceef082838d2d6662ab8a8285ad887fa897 100644 (file)
--- a/gcc/config/m32c/blkmov.md
+++ b/gcc/config/m32c/blkmov.md
@@ -215,8 +215,8 @@
 
 (define_expand "movstr"
   [(match_operand 0 "m32c_nonimmediate_operand" "")
-   (match_operand 1 "ap_operand" "")
-   (match_operand 2 "ap_operand" "")
+   (match_operand 1 "" "")
+   (match_operand 2 "" "")
    ]
   "TARGET_A24"
   "if (m32c_expand_movstr(operands)) DONE; FAIL;"

diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 055f34e9320d0971617bb8d9d3c7e369256e854a..c603770ad60f56b426d657ae73502e7fcd6fbabd 100644 (file)
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -4485,11 +4485,14 @@ m32c_emit_prologue (void)
 void
 m32c_emit_epilogue (void)
 {
+  int popm_count = m32c_pushm_popm (PP_justcount);
+
   /* This just emits a comment into the .s file for debugging.  */
-  if (m32c_pushm_popm (PP_justcount) > 0 || cfun->machine->is_interrupt)
+  if (popm_count > 0 || cfun->machine->is_interrupt)
     emit_insn (gen_epilogue_start ());
 
-  m32c_pushm_popm (PP_popm);
+  if (popm_count > 0)
+    m32c_pushm_popm (PP_popm);
 
   if (cfun->machine->is_interrupt)
     {
@@ -4546,7 +4549,6 @@ m32c_emit_epilogue (void)
     emit_jump_insn (gen_epilogue_exitd_16 ());
   else
     emit_jump_insn (gen_epilogue_exitd_24 ());
-  emit_barrier ();
 }
 
 void
@@ -4558,7 +4560,6 @@ m32c_emit_eh_epilogue (rtx ret_addr)
      assembler, so punt to libgcc.  */
   emit_jump_insn (gen_eh_epilogue (ret_addr, cfun->machine->eh_stack_adjust));
   /*  emit_clobber (gen_rtx_REG (HImode, R0L_REGNO)); */
-  emit_barrier ();
 }
 
 /* Indicate which flags must be properly set for a given conditional.  */

diff --git a/gcc/config/m32c/m32c.h b/gcc/config/m32c/m32c.h
index 7b5a5484582f7649a2ac300f295bd27158108c4a..6016ee56a13415a97b1c359529fd7be245b75df3 100644 (file)
--- a/gcc/config/m32c/m32c.h
+++ b/gcc/config/m32c/m32c.h
@@ -201,7 +201,7 @@ machine_function;
 #define WCHAR_TYPE "long int"
 
 #undef  WCHAR_TYPE_SIZE
-#define WCHAR_TYPE_SIZE BITS_PER_WORD
+#define WCHAR_TYPE_SIZE 32
 
 /* REGISTER USAGE */
 
@@ -288,19 +288,15 @@ machine_function;
   { 0x00000003 }, /* R02 - r0r2 */\
   { 0x0000000c }, /* R13 - r1r3 */\
   { 0x00000005 }, /* HL  - r0 r1 */\
-  { 0x00000005 }, /* QI  - r0 r1 */\
   { 0x0000000a }, /* R23 - r2 r3 */\
   { 0x0000000f }, /* R03 - r0r2 r1r3 */\
-  { 0x0000000f }, /* DI  - r0r2r1r3 + mems */\
   { 0x00000010 }, /* A0  - a0 */\
   { 0x00000020 }, /* A1  - a1 */\
   { 0x00000030 }, /* A   - a0 a1 */\
   { 0x000000f0 }, /* AD  - a0 a1 sb fp */\
   { 0x000001f0 }, /* PS  - a0 a1 sb fp sp */\
-  { 0x0000000f }, /* SI  - r0r2 r1r3 a0a1 */\
-  { 0x0000003f }, /* HI  - r0 r1 r2 r3 a0 a1 */\
   { 0x00000033 }, /* R02A  - r0r2 a0 a1 */ \
-  { 0x0000003f }, /* RA  - r0..r3 a0 a1 */\
+  { 0x0000003f }, /* RA  - r0 r1 r2 r3 a0 a1 */\
   { 0x0000007f }, /* GENERAL */\
   { 0x00000400 }, /* FLG */\
   { 0x000001ff }, /* HC  - r0l r1 r2 r3 a0 a1 sb fb sp */\
@@ -311,9 +307,14 @@ machine_function;
   { 0x000ff00f }, /* R03_MEM */\
   { 0x000ff03f }, /* A_HI_MEM */\
   { 0x000ff0ff }, /* A_AD_CR_MEM_SI */\
-  { 0x000ff1ff }, /* ALL */\
+  { 0x000ff5ff }, /* ALL */\
 }
 
+#define QI_REGS HL_REGS
+#define HI_REGS RA_REGS
+#define SI_REGS R03_REGS
+#define DI_REGS R03_REGS
+
 enum reg_class
 {
   NO_REGS,
@@ -328,17 +329,13 @@ enum reg_class
   R02_REGS,
   R13_REGS,
   HL_REGS,
-  QI_REGS,
   R23_REGS,
   R03_REGS,
-  DI_REGS,
   A0_REGS,
   A1_REGS,
   A_REGS,
   AD_REGS,
   PS_REGS,
-  SI_REGS,
-  HI_REGS,
   R02A_REGS,
   RA_REGS,
   GENERAL_REGS,
@@ -370,17 +367,13 @@ enum reg_class
 "R02_REGS", \
 "R13_REGS", \
 "HL_REGS", \
-"QI_REGS", \
 "R23_REGS", \
 "R03_REGS", \
-"DI_REGS", \
 "A0_REGS", \
 "A1_REGS", \
 "A_REGS", \
 "AD_REGS", \
 "PS_REGS", \
-"SI_REGS", \
-"HI_REGS", \
 "R02A_REGS", \
 "RA_REGS", \
 "GENERAL_REGS", \

diff --git a/gcc/config/m32c/prologue.md b/gcc/config/m32c/prologue.md
index 175b2b0ab9f014cea0df233100fba71c3918e185..f4e62db1d7548af331b2cb31c97308ea36d0adc7 100644 (file)
--- a/gcc/config/m32c/prologue.md
+++ b/gcc/config/m32c/prologue.md
@@ -88,14 +88,17 @@
 (define_expand "eh_return"
   [(match_operand:PSI 0 "" "")]
   ""
-  "m32c_emit_eh_epilogue(operands[0]); DONE;"
+  "m32c_emit_eh_epilogue(operands[0]);
+   emit_barrier ();
+   DONE;"
   )
 
 (define_insn "eh_epilogue"
   [(set (pc)
        (unspec_volatile [(match_operand 0 "m32c_r1_operand" "")
                          (match_operand 1 "m32c_r0_operand" "")
-                         ] UNS_EH_EPILOGUE))]
+                         ] UNS_EH_EPILOGUE))
+   (return)]
   ""
   "jmp.a\t__m32c_eh_return"
   [(set_attr "flags" "x")]