vc4: Add support for the TGSI FRC opcode.

v2: Rebase on helpers.

diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 307eda02cbed0c4f2059458c04f9d78fd292c32f..8c0b241d7ef0bfce2a110739c15f65acb2cee71d 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -301,6 +301,23 @@ tgsi_to_qir_trunc(struct tgsi_to_qir *trans,
         return qir_ITOF(c, qir_FTOI(c, src[0 * 4 + i]));
 }
 
+/**
+ * Computes x - floor(x), which is tricky because our FTOI truncates (rounds
+ * to zero).
+ */
+static struct qreg
+tgsi_to_qir_frc(struct tgsi_to_qir *trans,
+                struct tgsi_full_instruction *tgsi_inst,
+                enum qop op, struct qreg *src, int i)
+{
+        struct qcompile *c = trans->c;
+        struct qreg trunc = qir_ITOF(c, qir_FTOI(c, src[0 * 4 + i]));
+        struct qreg diff = qir_FSUB(c, src[0 * 4 + i], trunc);
+        return qir_CMP(c,
+                       diff,
+                       qir_FADD(c, diff, qir_uniform_f(trans, 1.0)),
+                       diff);
+}
 
 static struct qreg
 tgsi_to_qir_dp(struct tgsi_to_qir *trans,
@@ -424,6 +441,7 @@ emit_tgsi_instruction(struct tgsi_to_qir *trans,
                 [TGSI_OPCODE_LRP] = { 0, tgsi_to_qir_lrp },
                 [TGSI_OPCODE_POW] = { 0, tgsi_to_qir_pow },
                 [TGSI_OPCODE_TRUNC] = { 0, tgsi_to_qir_trunc },
+                [TGSI_OPCODE_FRC] = { 0, tgsi_to_qir_frc },
         };
         static int asdf = 0;
         uint32_t tgsi_op = tgsi_inst->Instruction.Opcode;