* config/tc-hppa.c (strict): Don't initialize. Update comment.

	(pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
	found.  Simplify handling of "ma" and "mb" completers.

	* hppa.h (FLAG_STRICT): Revise comment.
	(pa_opcode): Revise ordering rules.  Add/move strict pa10 variants
	before corresponding pa11 opcodes.  Add strict pa10 register-immediate
	entries for "fdc".

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 173ff2336530b0c680e997dfd0cfba5dc74cfe84..3ee3d630c84d1e5b74979965fa7b075ccaa8c66a 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2005-10-08  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       * config/tc-hppa.c (strict): Don't initialize.  Update comment.
+       (pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
+       found.  Simplify handling of "ma" and "mb" completers.
+
 2005-10-08  Paul Brook  <paul@codesourcery.com>
 
        * config/tc-arm.c: Don't provide fallback default for CPU_DEFAULT.

diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c
index 1c1b4e45eba5c48b901fa46cecec39c57b3e0d2c..7615eb068d4147c53a44d3da69ad8402966f9559 100644 (file)
--- a/gas/config/tc-hppa.c
+++ b/gas/config/tc-hppa.c
@@ -771,11 +771,15 @@ static label_symbol_struct *label_symbols_rootp = NULL;
 /* Holds the last field selector.  */
 static int hppa_field_selector;
 
-/* Nonzero when strict syntax checking is enabled.  Zero otherwise.
+/* Nonzero when strict matching is enabled.  Zero otherwise.
 
-   Each opcode in the table has a flag which indicates whether or not
-   strict syntax checking should be enabled for that instruction.  */
-static int strict = 0;
+   Each opcode in the table has a flag which indicates whether or
+   not strict matching should be enabled for that instruction.
+
+   Mainly, strict causes errors to be ignored when a match failure
+   occurs.  However, it also affects the parsing of register fields
+   by pa_parse_number.  */
+static int strict;
 
 /* pa_parse_number returns values in `pa_number'.  Mostly
    pa_parse_number is used to return a register number, with floating
@@ -1581,12 +1585,10 @@ pa_ip (str)
   char *s, c, *argstart, *name, *save_s;
   const char *args;
   int match = FALSE;
-  int need_promotion = FALSE;
   int comma = 0;
   int cmpltr, nullif, flag, cond, num;
   unsigned long opcode;
   struct pa_opcode *insn;
-  struct pa_opcode *promoted_insn = NULL;
 
 #ifdef OBJ_SOM
   /* We must have a valid space and subspace.  */
@@ -1647,7 +1649,7 @@ pa_ip (str)
 
       the_insn.reloc = R_HPPA_NONE;
 
-      if (insn->arch >= 20
+      if (insn->arch >= pa20
          && bfd_get_mach (stdoutput) < insn->arch)
        goto failed;
 
@@ -1844,9 +1846,9 @@ pa_ip (str)
                        else if ((strncasecmp (s, "s ", 2) == 0)
                                 || (strncasecmp (s, "s,", 2) == 0))
                          uu = 1;
-                       /* When in strict mode this is a match failure.  */
                        else if (strict)
                          {
+                           /* This is a match failure.  */
                            s--;
                            break;
                          }
@@ -1872,28 +1874,25 @@ pa_ip (str)
                    int m = 0;
                    if (*s == ',')
                      {
-                       int found = 0;
                        s++;
                        if (strncasecmp (s, "ma", 2) == 0)
                          {
                            a = 0;
                            m = 1;
-                           found = 1;
+                           s += 2;
                          }
                        else if (strncasecmp (s, "mb", 2) == 0)
                          {
                            a = 1;
                            m = 1;
-                           found = 1;
+                           s += 2;
                          }
-
-                       /* When in strict mode, pass through for cache op.  */
-                       if (!found && strict)
+                       else if (strict)
+                         /* This is a match failure.  */
                          s--;
                        else
                          {
-                           if (!found)
-                             as_bad (_("Invalid Short Load/Store Completer."));
+                           as_bad (_("Invalid Short Load/Store Completer."));
                            s += 2;
                          }
                      }
@@ -1946,7 +1945,7 @@ pa_ip (str)
                          a = 0;
                        else if (strncasecmp (s, "e", 1) == 0)
                          a = 1;
-                       /* When in strict mode this is a match failure.  */
+                       /* In strict mode, this is a match failure.  */
                        else if (strict)
                          {
                            s--;
@@ -3962,19 +3961,11 @@ pa_ip (str)
         then set a new architecture.  This automatic promotion crud is
         for compatibility with HP's old assemblers only.  */
       if (match == TRUE
-         && bfd_get_mach (stdoutput) < insn->arch)
+         && bfd_get_mach (stdoutput) < insn->arch
+         && !bfd_set_arch_mach (stdoutput, bfd_arch_hppa, insn->arch))
        {
-         if (need_promotion)
-           {
-             if (!bfd_set_arch_mach (stdoutput, bfd_arch_hppa, insn->arch))
-               as_warn (_("could not update architecture and machine"));
-           }
-         else
-           {
-             match = FALSE;
-             if (!promoted_insn)
-               promoted_insn = insn;
-           }
+         as_warn (_("could not update architecture and machine"));
+         match = FALSE;
        }
 
  failed:
@@ -3990,13 +3981,6 @@ pa_ip (str)
            }
          else
            {
-             if (promoted_insn)
-               {
-                 insn = promoted_insn;
-                 need_promotion = TRUE;
-                 s = argstart;
-                 continue;
-               }
              as_bad (_("Invalid operands %s"), error_message);
              return;
            }

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 9418e3965c8f50e5e70341791de5aafaee34fe54..cf31d8deb31213704dc69762eab9f9aa73fa3fdf 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,10 @@
+2005-10-08  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       * hppa.h (FLAG_STRICT): Revise comment.
+       (pa_opcode): Revise ordering rules.  Add/move strict pa10 variants
+       before corresponding pa11 opcodes.  Add strict pa10 register-immediate
+       entries for "fdc".
+
 2005-09-24  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
        * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.

diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h
index 96f65eae5dd52c6a04f1b7582c9b2089645c37bd..af1be477d408608290dec378515bfa5c3c1c73d1 100644 (file)
--- a/include/opcode/hppa.h
+++ b/include/opcode/hppa.h
@@ -48,12 +48,8 @@ struct pa_opcode
     char flags;
 };
 
-/* Enable/disable strict syntax checking.  When strict syntax checking
-   is not used, out-of-range immediate fields can result in an error,
-   depending on the specific immediate range being matched.  An immediate
-   value of zero is also accepted as equivalent to index register 0.
-   As a result, non-strict opcode entries must be ordered from largest
-   to smallest immediate range.  */
+/* Enables strict matching.  Opcodes with match errors are skipped
+   when this bit is set.  */
 #define FLAG_STRICT 0x1
 
 /*
@@ -173,9 +169,9 @@ Also these:
 
 Completer operands all have 'c' as the prefix:
 
-   cx   indexed load completer.
-   cX   indexed load completer.  Like cx, but emits a space after
-        in disassembler.
+   cx   indexed load and store completer.
+   cX   indexed load and store completer.  Like cx, but emits a space
+       after in disassembler.
    cm   short load and store completer.
    cM   short load and store completer.  Like cm, but emits a space
         after in disassembler.
@@ -287,28 +283,31 @@ static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e
    * The assembler requires that all instances of the same mnemonic be
      consecutive.  If they aren't, the assembler will bomb at runtime.
 
+   * Immediate fields use pa_get_absolute_expression to parse the
+     string.  It will generate a "bad expression" error if passed
+     a register name.  Thus, register index variants of an opcode
+     need to precede immediate variants.
+
    * The disassembler does not care about the order of the opcodes
      except in cases where implicit addressing is used.
 
-   Strict syntax (FLAG_STRICT) should be used for pa11 opcodes
-   and later.
-
    Here are the rules for ordering the opcodes of a mnemonic:
 
-   1) Opcodes with FLAG_STRICT precede opcodes without FLAG_STRICT,
+   1) Opcodes with FLAG_STRICT should precede opcodes without
+      FLAG_STRICT.
 
    2) Opcodes with FLAG_STRICT should be ordered as follows:
       register index opcodes, short immediate opcodes, and finally
-      long immediate opcodes.  Where there are opcodes for more
-      than one architecture in any of these groups, the opcodes
-      for the higher architecture should come first,
+      long immediate opcodes.  When both pa10 and pa11 variants
+      of the same opcode are available, the pa10 opcode should
+      come first for correct architectural promotion.
 
-   3) Where implicit addressing is available for an opcode, the
-      implicit opcode should precede the explicit opcode, and
+   3) When implicit addressing is available for an opcode, the
+      implicit opcode should precede the explicit opcode.
 
-   4) Opcodes without FLAG_STRICT should be ordered as follows: long
-      immediate opcodes, short immediate opcodes and finally register
-      index opcodes.  */
+   4) Opcodes without FLAG_STRICT should be ordered as follows:
+      register index opcodes, long immediate opcodes, and finally
+      short immediate opcodes.  */
        
 static const struct pa_opcode pa_opcodes[] =
 {
@@ -355,10 +354,14 @@ static const struct pa_opcode pa_opcodes[] =
 { "ldd",       0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT},
 { "ldd",       0x50000000, 0xfc00c002, "cq#(b),x", pa20, FLAG_STRICT},
 { "ldd",       0x50000000, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT},
+{ "ldw",       0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldw",       0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldw",       0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldw",       0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
 { "ldw",       0x0c0010a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
 { "ldw",       0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
+{ "ldw",       0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldw",       0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldw",       0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
 { "ldw",       0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
 { "ldw",       0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT},
@@ -366,40 +369,36 @@ static const struct pa_opcode pa_opcodes[] =
 { "ldw",       0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 { "ldw",       0x5c000004, 0xfc00c006, "ceK(b),x", pa20, FLAG_STRICT},
 { "ldw",       0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
-{ "ldw",       0x4c000000, 0xfc00c000, "ceJ(b),x", pa10, 0},
-{ "ldw",       0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, 0},
+{ "ldw",       0x4c000000, 0xfc00c000, "ceJ(b),x", pa10, FLAG_STRICT},
+{ "ldw",       0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
 { "ldw",       0x48000000, 0xfc00c000, "j(b),x", pa10, 0},
 { "ldw",       0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
-{ "ldw",       0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, 0},
-{ "ldw",       0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
-{ "ldw",       0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, 0},
-{ "ldw",       0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
+{ "ldh",       0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldh",       0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldh",       0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldh",       0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
 { "ldh",       0x0c001060, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
 { "ldh",       0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
+{ "ldh",       0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldh",       0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldh",       0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
 { "ldh",       0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
 { "ldh",       0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 { "ldh",       0x44000000, 0xfc00c000, "j(b),x", pa10, 0},
 { "ldh",       0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
-{ "ldh",       0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, 0},
-{ "ldh",       0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
-{ "ldh",       0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, 0},
-{ "ldh",       0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
+{ "ldb",       0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldb",       0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldb",       0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldb",       0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
 { "ldb",       0x0c001020, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
 { "ldb",       0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
+{ "ldb",       0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldb",       0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldb",       0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
 { "ldb",       0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
 { "ldb",       0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 { "ldb",       0x40000000, 0xfc00c000, "j(b),x", pa10, 0},
 { "ldb",       0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
-{ "ldb",       0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, 0},
-{ "ldb",       0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
-{ "ldb",       0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, 0},
-{ "ldb",       0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
 { "std",       0x0c0012e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 { "std",       0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 { "std",       0x0c0012c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
@@ -409,6 +408,8 @@ static const struct pa_opcode pa_opcodes[] =
 { "std",       0x70000000, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT},
 { "stw",       0x0c0012a0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 { "stw",       0x0c0012a0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
+{ "stw",       0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
+{ "stw",       0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
 { "stw",       0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
 { "stw",       0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
 { "stw",       0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT},
@@ -416,66 +417,70 @@ static const struct pa_opcode pa_opcodes[] =
 { "stw",       0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 { "stw",       0x7c000004, 0xfc00c006, "cex,K(b)", pa20, FLAG_STRICT},
 { "stw",       0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
-{ "stw",       0x6c000000, 0xfc00c000, "cex,J(b)", pa10, 0},
-{ "stw",       0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, 0},
+{ "stw",       0x6c000000, 0xfc00c000, "cex,J(b)", pa10, FLAG_STRICT},
+{ "stw",       0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
 { "stw",       0x68000000, 0xfc00c000, "x,j(b)", pa10, 0},
 { "stw",       0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
-{ "stw",       0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
-{ "stw",       0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
 { "sth",       0x0c001260, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 { "sth",       0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
+{ "sth",       0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
+{ "sth",       0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
 { "sth",       0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
 { "sth",       0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
 { "sth",       0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 { "sth",       0x64000000, 0xfc00c000, "x,j(b)", pa10, 0},
 { "sth",       0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
-{ "sth",       0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
-{ "sth",       0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
 { "stb",       0x0c001220, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 { "stb",       0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
+{ "stb",       0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
+{ "stb",       0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
 { "stb",       0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
 { "stb",       0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
 { "stb",       0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 { "stb",       0x60000000, 0xfc00c000, "x,j(b)", pa10, 0},
 { "stb",       0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
-{ "stb",       0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
-{ "stb",       0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
 { "ldwm",      0x4c000000, 0xfc00c000, "j(b),x", pa10, 0},
 { "ldwm",      0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
 { "stwm",      0x6c000000, 0xfc00c000, "x,j(b)", pa10, 0},
 { "stwm",      0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
+{ "ldwx",      0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldwx",      0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldwx",      0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldwx",      0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
 { "ldwx",      0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, 0},
 { "ldwx",      0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
+{ "ldhx",      0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldhx",      0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldhx",      0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldhx",      0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
 { "ldhx",      0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, 0},
 { "ldhx",      0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
+{ "ldbx",      0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldbx",      0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldbx",      0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldbx",      0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
 { "ldbx",      0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, 0},
 { "ldbx",      0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
+{ "ldwa",      0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
 { "ldwa",      0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldwa",      0x0c0011a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
+{ "ldwa",      0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
 { "ldwa",      0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
-{ "ldwa",      0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0},
-{ "ldwa",      0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0},
+{ "ldcw",      0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldcw",      0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldcw",      0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT},
 { "ldcw",      0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT},
+{ "ldcw",      0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldcw",      0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldcw",      0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT},
 { "ldcw",      0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT},
-{ "ldcw",      0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, 0},
-{ "ldcw",      0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
-{ "ldcw",      0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, 0},
-{ "ldcw",      0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
 { "stwa",      0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
+{ "stwa",      0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
 { "stwa",      0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
-{ "stwa",      0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
+{ "stby",      0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT},
+{ "stby",      0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT},
 { "stby",      0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT},
 { "stby",      0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT},
-{ "stby",      0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, 0},
-{ "stby",      0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0},
 { "ldda",      0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
 { "ldda",      0x0c001120, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
 { "ldda",      0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
@@ -485,46 +490,67 @@ static const struct pa_opcode pa_opcodes[] =
 { "ldcd",      0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
 { "stda",      0x0c0013e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 { "stda",      0x0c0013c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
+{ "ldwax",     0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
 { "ldwax",     0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
 { "ldwax",     0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0},
+{ "ldcwx",     0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
+{ "ldcwx",     0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
 { "ldcwx",     0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT},
 { "ldcwx",     0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT},
 { "ldcwx",     0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, 0},
 { "ldcwx",     0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
+{ "ldws",      0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldws",      0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldws",      0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
 { "ldws",      0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
 { "ldws",      0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, 0},
 { "ldws",      0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
+{ "ldhs",      0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldhs",      0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldhs",      0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
 { "ldhs",      0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
 { "ldhs",      0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, 0},
 { "ldhs",      0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
+{ "ldbs",      0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldbs",      0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldbs",      0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
 { "ldbs",      0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
 { "ldbs",      0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, 0},
 { "ldbs",      0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
+{ "ldwas",     0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
 { "ldwas",     0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
 { "ldwas",     0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0},
+{ "ldcws",     0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
+{ "ldcws",     0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
 { "ldcws",     0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT},
 { "ldcws",     0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT},
 { "ldcws",     0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, 0},
 { "ldcws",     0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
+{ "stws",      0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
+{ "stws",      0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
 { "stws",      0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
 { "stws",      0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
 { "stws",      0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
 { "stws",      0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
+{ "sths",      0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
+{ "sths",      0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
 { "sths",      0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
 { "sths",      0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
 { "sths",      0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
 { "sths",      0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
+{ "stbs",      0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
+{ "stbs",      0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
 { "stbs",      0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
 { "stbs",      0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
 { "stbs",      0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
 { "stbs",      0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
+{ "stwas",     0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
 { "stwas",     0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
 { "stwas",     0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
 { "stdby",     0x0c001340, 0xfc00d3c0, "cscCx,V(b)", pa20, FLAG_STRICT},
 { "stdby",     0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
+{ "stbys",     0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT},
+{ "stbys",     0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT},
 { "stbys",     0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT},
 { "stbys",     0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT},
 { "stbys",     0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, 0},
@@ -753,6 +779,8 @@ static const struct pa_opcode pa_opcodes[] =
 { "iitlbp",    0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
 { "pdc",       0x04001380, 0xfc00ffdf, "cZx(b)", pa10, 0},
 { "pdc",       0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
+{ "fdc",       0x04001280, 0xfc00ffdf, "cZx(b)", pa10, FLAG_STRICT},
+{ "fdc",       0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, FLAG_STRICT},
 { "fdc",       0x04003280, 0xfc00ffff, "5(b)", pa20, FLAG_STRICT},
 { "fdc",       0x04003280, 0xfc003fff, "5(s,b)", pa20, FLAG_STRICT},
 { "fdc",       0x04001280, 0xfc00ffdf, "cZx(b)", pa10, 0},
@@ -785,10 +813,14 @@ static const struct pa_opcode pa_opcodes[] =
 
 /* Floating Point Coprocessor Instructions.  */
  
+{ "fldw",      0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT},
+{ "fldw",      0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT},
 { "fldw",      0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT},
 { "fldw",      0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT},
 { "fldw",      0x24001020, 0xfc1ff3a0, "cocc@(b),fT", pa20, FLAG_STRICT},
 { "fldw",      0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
+{ "fldw",      0x24001000, 0xfc00df80, "cM5(b),fT", pa10, FLAG_STRICT},
+{ "fldw",      0x24001000, 0xfc001f80, "cM5(s,b),fT", pa10, FLAG_STRICT},
 { "fldw",      0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT},
 { "fldw",      0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT},
 { "fldw",      0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT},
@@ -797,82 +829,94 @@ static const struct pa_opcode pa_opcodes[] =
 { "fldw",      0x5c000000, 0xfc000004, "d(s,b),fe", pa20, FLAG_STRICT},
 { "fldw",      0x58000000, 0xfc00c000, "cJd(b),fe", pa20, FLAG_STRICT},
 { "fldw",      0x58000000, 0xfc000000, "cJd(s,b),fe", pa20, FLAG_STRICT},
-{ "fldw",      0x24001000, 0xfc00df80, "cM5(b),fT", pa10, 0},
-{ "fldw",      0x24001000, 0xfc001f80, "cM5(s,b),fT", pa10, 0},
-{ "fldw",      0x24000000, 0xfc00df80, "cXx(b),fT", pa10, 0},
-{ "fldw",      0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0},
+{ "fldd",      0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT},
+{ "fldd",      0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT},
 { "fldd",      0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT},
 { "fldd",      0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT},
 { "fldd",      0x2c001020, 0xfc1ff3e0, "cocc@(b),ft", pa20, FLAG_STRICT},
 { "fldd",      0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
+{ "fldd",      0x2c001000, 0xfc00dfc0, "cM5(b),ft", pa10, FLAG_STRICT},
+{ "fldd",      0x2c001000, 0xfc001fc0, "cM5(s,b),ft", pa10, FLAG_STRICT},
 { "fldd",      0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT},
 { "fldd",      0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT},
 { "fldd",      0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT},
 { "fldd",      0x50000002, 0xfc00c002, "cq#(b),fx", pa20, FLAG_STRICT},
 { "fldd",      0x50000002, 0xfc000002, "cq#(s,b),fx", pa20, FLAG_STRICT},
-{ "fldd",      0x2c001000, 0xfc00dfc0, "cM5(b),ft", pa10, 0},
-{ "fldd",      0x2c001000, 0xfc001fc0, "cM5(s,b),ft", pa10, 0},
-{ "fldd",      0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, 0},
-{ "fldd",      0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0},
+{ "fstw",      0x24000200, 0xfc00df80, "cXfT,x(b)", pa10, FLAG_STRICT},
+{ "fstw",      0x24000200, 0xfc001f80, "cXfT,x(s,b)", pa10, FLAG_STRICT},
 { "fstw",      0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT},
 { "fstw",      0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT},
 { "fstw",      0x24001220, 0xfc1ff3a0, "cocCfT,@(b)", pa20, FLAG_STRICT},
 { "fstw",      0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa20, FLAG_STRICT},
 { "fstw",      0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT},
 { "fstw",      0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT},
+{ "fstw",      0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT},
+{ "fstw",      0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT},
 { "fstw",      0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT},
 { "fstw",      0x78000000, 0xfc000000, "cJfE,y(b)", pa20w, FLAG_STRICT},
 { "fstw",      0x7c000000, 0xfc00c004, "fE,d(b)", pa20, FLAG_STRICT},
 { "fstw",      0x7c000000, 0xfc000004, "fE,d(s,b)", pa20, FLAG_STRICT},
 { "fstw",      0x78000000, 0xfc00c000, "cJfE,d(b)", pa20, FLAG_STRICT},
 { "fstw",      0x78000000, 0xfc000000, "cJfE,d(s,b)", pa20, FLAG_STRICT},
-{ "fstw",      0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, 0},
-{ "fstw",      0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, 0},
-{ "fstw",      0x24000200, 0xfc00df80, "cXfT,x(b)", pa10, 0},
-{ "fstw",      0x24000200, 0xfc001f80, "cXfT,x(s,b)", pa10, 0},
+{ "fstd",      0x2c000200, 0xfc00dfc0, "cXft,x(b)", pa10, FLAG_STRICT},
+{ "fstd",      0x2c000200, 0xfc001fc0, "cXft,x(s,b)", pa10, FLAG_STRICT},
 { "fstd",      0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT},
 { "fstd",      0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT},
 { "fstd",      0x2c001220, 0xfc1ff3e0, "cocCft,@(b)", pa20, FLAG_STRICT},
 { "fstd",      0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa20, FLAG_STRICT},
+{ "fstd",      0x2c001200, 0xfc00dfc0, "cMft,5(b)", pa10, FLAG_STRICT},
+{ "fstd",      0x2c001200, 0xfc001fc0, "cMft,5(s,b)", pa10, FLAG_STRICT},
 { "fstd",      0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT},
 { "fstd",      0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT},
 { "fstd",      0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT},
 { "fstd",      0x70000002, 0xfc00c002, "cqfx,#(b)", pa20, FLAG_STRICT},
 { "fstd",      0x70000002, 0xfc000002, "cqfx,#(s,b)", pa20, FLAG_STRICT},
-{ "fstd",      0x2c001200, 0xfc00dfc0, "cMft,5(b)", pa10, 0},
-{ "fstd",      0x2c001200, 0xfc001fc0, "cMft,5(s,b)", pa10, 0},
-{ "fstd",      0x2c000200, 0xfc00dfc0, "cXft,x(b)", pa10, 0},
-{ "fstd",      0x2c000200, 0xfc001fc0, "cXft,x(s,b)", pa10, 0},
+{ "fldwx",     0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT},
+{ "fldwx",     0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT},
 { "fldwx",     0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT},
 { "fldwx",     0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT},
 { "fldwx",     0x24000000, 0xfc00df80, "cXx(b),fT", pa10, 0},
 { "fldwx",     0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0},
+{ "flddx",     0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT},
+{ "flddx",     0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT},
 { "flddx",     0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT},
 { "flddx",     0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT},
 { "flddx",     0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, 0},
 { "flddx",     0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0},
+{ "fstwx",     0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, FLAG_STRICT},
+{ "fstwx",     0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, FLAG_STRICT},
 { "fstwx",     0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT},
 { "fstwx",     0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT},
 { "fstwx",     0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, 0},
 { "fstwx",     0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
+{ "fstdx",     0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, FLAG_STRICT},
+{ "fstdx",     0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, FLAG_STRICT},
 { "fstdx",     0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT},
 { "fstdx",     0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT},
 { "fstdx",     0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0},
 { "fstdx",     0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 { "fstqx",     0x3c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0},
 { "fstqx",     0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
+{ "fldws",     0x24001000, 0xfc00df80, "cm5(b),fT", pa10, FLAG_STRICT},
+{ "fldws",     0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, FLAG_STRICT},
 { "fldws",     0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT},
 { "fldws",     0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT},
 { "fldws",     0x24001000, 0xfc00df80, "cm5(b),fT", pa10, 0},
 { "fldws",     0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
+{ "fldds",     0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, FLAG_STRICT},
+{ "fldds",     0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, FLAG_STRICT},
 { "fldds",     0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT},
 { "fldds",     0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT},
 { "fldds",     0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, 0},
 { "fldds",     0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
+{ "fstws",     0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, FLAG_STRICT},
+{ "fstws",     0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, FLAG_STRICT},
 { "fstws",     0x24001200, 0xfc00d380, "cmcCfT,5(b)", pa11, FLAG_STRICT},
 { "fstws",     0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa11, FLAG_STRICT},
 { "fstws",     0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, 0},
 { "fstws",     0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
+{ "fstds",     0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, FLAG_STRICT},
+{ "fstds",     0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, FLAG_STRICT},
 { "fstds",     0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT},
 { "fstds",     0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT},
 { "fstds",     0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0},
@@ -937,74 +981,90 @@ static const struct pa_opcode pa_opcodes[] =
 { "spop2",     0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
 { "spop3",     0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
 { "copr",      0x30000000, 0xfc000000, "u,2N", pa10, 0},
+{ "cldw",      0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
+{ "cldw",      0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
 { "cldw",      0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
 { "cldw",      0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
 { "cldw",      0x24001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT},
 { "cldw",      0x24001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT},
+{ "cldw",      0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
+{ "cldw",      0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
 { "cldw",      0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
 { "cldw",      0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
-{ "cldw",      0x24001000, 0xfc00de00, "ucM5(b),t", pa10, 0},
-{ "cldw",      0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
-{ "cldw",      0x24000000, 0xfc00de00, "ucXx(b),t", pa10, 0},
-{ "cldw",      0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
+{ "cldd",      0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
+{ "cldd",      0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
 { "cldd",      0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
 { "cldd",      0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
 { "cldd",      0x2c001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT},
 { "cldd",      0x2c001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT},
+{ "cldd",      0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
+{ "cldd",      0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
 { "cldd",      0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
 { "cldd",      0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
-{ "cldd",      0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, 0},
-{ "cldd",      0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
-{ "cldd",      0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, 0},
-{ "cldd",      0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
+{ "cstw",      0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
+{ "cstw",      0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
 { "cstw",      0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
 { "cstw",      0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
 { "cstw",      0x24001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT},
 { "cstw",      0x24001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT},
+{ "cstw",      0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
+{ "cstw",      0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
 { "cstw",      0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
 { "cstw",      0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
-{ "cstw",      0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, 0},
-{ "cstw",      0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0},
-{ "cstw",      0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, 0},
-{ "cstw",      0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
+{ "cstd",      0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
+{ "cstd",      0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
 { "cstd",      0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
 { "cstd",      0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
 { "cstd",      0x2c001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT},
 { "cstd",      0x2c001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT},
+{ "cstd",      0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
+{ "cstd",      0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
 { "cstd",      0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
 { "cstd",      0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
-{ "cstd",      0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, 0},
-{ "cstd",      0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0},
-{ "cstd",      0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, 0},
-{ "cstd",      0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
+{ "cldwx",     0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
+{ "cldwx",     0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
 { "cldwx",     0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
 { "cldwx",     0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
 { "cldwx",     0x24000000, 0xfc00de00, "ucXx(b),t", pa10, 0},
 { "cldwx",     0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
+{ "clddx",     0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
+{ "clddx",     0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
 { "clddx",     0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
 { "clddx",     0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
 { "clddx",     0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, 0},
 { "clddx",     0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
+{ "cstwx",     0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
+{ "cstwx",     0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
 { "cstwx",     0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
 { "cstwx",     0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
 { "cstwx",     0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, 0},
 { "cstwx",     0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
+{ "cstdx",     0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
+{ "cstdx",     0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
 { "cstdx",     0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
 { "cstdx",     0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
 { "cstdx",     0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, 0},
 { "cstdx",     0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
+{ "cldws",     0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
+{ "cldws",     0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
 { "cldws",     0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
 { "cldws",     0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
 { "cldws",     0x24001000, 0xfc00de00, "ucM5(b),t", pa10, 0},
 { "cldws",     0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
+{ "cldds",     0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
+{ "cldds",     0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
 { "cldds",     0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
 { "cldds",     0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
 { "cldds",     0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, 0},
 { "cldds",     0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
+{ "cstws",     0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
+{ "cstws",     0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
 { "cstws",     0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
 { "cstws",     0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
 { "cstws",     0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, 0},
 { "cstws",     0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0},
+{ "cstds",     0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
+{ "cstds",     0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
 { "cstds",     0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
 { "cstds",     0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
 { "cstds",     0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, 0},