amd/common:add uvd hevc enc support check in hw query
authorJames Zhu <James.Zhu@amd.com>
Mon, 5 Feb 2018 21:28:13 +0000 (16:28 -0500)
committerLeo Liu <leo.liu@amd.com>
Wed, 21 Feb 2018 18:53:38 +0000 (13:53 -0500)
Based on amdgpu hardware query information to check if UVD hevc enc support

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/amd/common/ac_gpu_info.c
src/amd/common/ac_gpu_info.h

index b5b059e120210c36a14f590e5c8454a8295a4d89..146098baa0ce454ccd622b565e39d2e6c22b415c 100644 (file)
@@ -98,7 +98,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 {
        struct amdgpu_buffer_size_alignments alignment_info = {};
        struct amdgpu_heap_info vram, vram_vis, gtt;
-       struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, vce = {}, vcn_dec = {}, vcn_enc = {};
+       struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, uvd_enc = {}, vce = {}, vcn_dec = {}, vcn_enc = {};
        uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0;
        int r, i, j;
        drmDevicePtr devinfo;
@@ -166,6 +166,14 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
                return false;
        }
 
+       if (info->drm_major == 3 && info->drm_minor >= 17) {
+               r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_UVD_ENC, 0, &uvd_enc);
+               if (r) {
+                       fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(uvd_enc) failed.\n");
+                       return false;
+               }
+       }
+
        if (info->drm_major == 3 && info->drm_minor >= 17) {
                r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_VCN_DEC, 0, &vcn_dec);
                if (r) {
@@ -281,6 +289,8 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
                uvd.available_rings ? uvd_version : 0;
        info->vce_fw_version =
                vce.available_rings ? vce_version : 0;
+       info->uvd_enc_supported =
+               uvd_enc.available_rings ? true : false;
        info->has_userptr = true;
        info->has_syncobj = has_syncobj(fd);
        info->has_syncobj_wait_for_submit = info->has_syncobj && info->drm_minor >= 20;
index ae42aff6017ee7eebb6af8e9042285e34331c839..7c86dc1cb6f178b866011dfd4f7f1b8e1339d431 100644 (file)
@@ -66,6 +66,7 @@ struct radeon_info {
        uint32_t                    num_compute_rings;
        uint32_t                    uvd_fw_version;
        uint32_t                    vce_fw_version;
+       bool                        uvd_enc_supported;
        uint32_t                    me_fw_version;
        uint32_t                    me_fw_feature;
        uint32_t                    pfp_fw_version;