morph conversion of floating-point for storing, through sv_proc_t

diff --git a/riscv/insns/c_fsd.h b/riscv/insns/c_fsd.h
index 421caa836e9d25693ef589f12d288c6377ee75e8..00c0b5d485ba2bfe866f21f33adc59a2609a9c99 100644 (file)
--- a/riscv/insns/c_fsd.h
+++ b/riscv/insns/c_fsd.h
@@ -1,4 +1,4 @@
 require_extension('C');
 require_extension('D');
 require_fp;
-MMU.store_uint64(insn.rvc_rs1s(), insn.rvc_ld_imm(), RVC_FRS2S.to_uint64()); // RVC_RS1S
+MMU.store_uint64(insn.rvc_rs1s(), insn.rvc_ld_imm(), to_uint64(RVC_FRS2S)); // RVC_RS1S

diff --git a/riscv/insns/c_fsdsp.h b/riscv/insns/c_fsdsp.h
index e0b523e2ea1f5a264f00f4dab09c8c55e21ad8fc..2c12e595be8f1c2bc4c8d588f77a6ef0b9af1ec8 100644 (file)
--- a/riscv/insns/c_fsdsp.h
+++ b/riscv/insns/c_fsdsp.h
@@ -1,4 +1,4 @@
 require_extension('C');
 require_extension('D');
 require_fp;
-MMU.store_uint64(rv_add(RVC_SP, insn.rvc_sdsp_imm()), RVC_FRS2.to_uint64());
+MMU.store_uint64(rv_add(RVC_SP, insn.rvc_sdsp_imm()), to_uint64(RVC_FRS2));

diff --git a/riscv/insns/c_fsw.h b/riscv/insns/c_fsw.h
index 6cdd4191befe969c612e317f857b3013200f8d52..f8f460ce4966d71124d281fb3abfc2e278a32380 100644 (file)
--- a/riscv/insns/c_fsw.h
+++ b/riscv/insns/c_fsw.h
@@ -2,7 +2,7 @@ require_extension('C');
 if (xlen == 32) {
   require_extension('F');
   require_fp;
-  MMU.store_uint32(insn.rvc_rs1s(), insn.rvc_lw_imm(), RVC_FRS2S.to_uint32()); //RVC_RS1S
+  MMU.store_uint32(insn.rvc_rs1s(), insn.rvc_lw_imm(), to_uint32(RVC_FRS2S)); //RVC_RS1S
 } else { // c.sd
   MMU.store_uint64(insn.rvc_rs1s(), insn.rvc_ld_imm(), RVC_RS2S); //RVC_RS1S, 
 }

diff --git a/riscv/insns/c_fswsp.h b/riscv/insns/c_fswsp.h
index 2da961808f707744255578929e6aeed4d4a6f5a0..a8e5eecdcc0a286d59fe73f5e49857028bd9b009 100644 (file)
--- a/riscv/insns/c_fswsp.h
+++ b/riscv/insns/c_fswsp.h
@@ -2,7 +2,7 @@ require_extension('C');
 if (xlen == 32) {
   require_extension('F');
   require_fp;
-  MMU.store_uint32(rv_add(RVC_SP, insn.rvc_swsp_imm()), RVC_FRS2.to_uint32());
+  MMU.store_uint32(rv_add(RVC_SP, insn.rvc_swsp_imm()), to_uint32(RVC_FRS2));
 } else { // c.sdsp
   MMU.store_uint64(rv_add(RVC_SP, insn.rvc_sdsp_imm()), RVC_RS2);
 }

diff --git a/riscv/insns/fmv_x_d.h b/riscv/insns/fmv_x_d.h
index 1dd251160a2d3e9d3f91d20e82f877c8d4307808..f6719e6205e96c18e2f45b838712459738736f6e 100644 (file)
--- a/riscv/insns/fmv_x_d.h
+++ b/riscv/insns/fmv_x_d.h
@@ -1,4 +1,4 @@
 require_extension('D');
 require_rv64;
 require_fp;
-WRITE_RD(FRS1.to_uint64());
+WRITE_RD(to_uint64(FRS1));

diff --git a/riscv/insns/fmv_x_w.h b/riscv/insns/fmv_x_w.h
index 616c7e9f3f5c05f89abab8c4bb7cd65a1aa21bc6..6247c6c3fb7b9c7c04c19ee1c64bd39514d78335 100644 (file)
--- a/riscv/insns/fmv_x_w.h
+++ b/riscv/insns/fmv_x_w.h
@@ -1,3 +1,3 @@
 require_extension('F');
 require_fp;
-WRITE_RD(sext32(sv_reg_t(FRS1.to_uint32())));
+WRITE_RD(sext32(to_uint32(FRS1)));

diff --git a/riscv/insns/fsd.h b/riscv/insns/fsd.h
index 40b5b7313734c271b9c651bc784e047665171155..c7cf8690b90b3e3ea7b5c9a70b1b3cfae91757b5 100644 (file)
--- a/riscv/insns/fsd.h
+++ b/riscv/insns/fsd.h
@@ -1,3 +1,3 @@
 require_extension('D');
 require_fp;
-MMU.store_uint64(insn.rs1(), insn.s_imm(), FRS2.to_uint64()); // RS1
+MMU.store_uint64(insn.rs1(), insn.s_imm(), to_uint64(FRS2)); // RS1

diff --git a/riscv/insns/fsw.h b/riscv/insns/fsw.h
index 0b709979ccb6c7e5684b07842eb7f1d8d4475f1c..054bd4dba16e36c014227e86445537791dcb62f9 100644 (file)
--- a/riscv/insns/fsw.h
+++ b/riscv/insns/fsw.h
@@ -1,3 +1,3 @@
 require_extension('F');
 require_fp;
-MMU.store_uint32(insn.rs1(), insn.s_imm(), FRS2.to_uint32()); // RS1
+MMU.store_uint32(insn.rs1(), insn.s_imm(), to_uint32(FRS2)); // RS1

diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index 0327fb6ca686cafb075f6ec198dae25be6adad99..ce3db5f5cd2b05272f6959c9ce17f6090d04eecc 100644 (file)
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -885,6 +885,25 @@ void sv_proc_t::mmu_store(reg_spec_t const& spec, sv_reg_t const& offs,
     }
 }
 
+// ------
+
+sv_reg_t sv_proc_t::to_uint64(sv_freg_t const& reg)
+{
+    return sv_reg_t(reg.to_uint64());
+}
+
+sv_reg_t sv_proc_t::to_uint32(sv_freg_t const& reg)
+{
+    return sv_reg_t(reg.to_uint32());
+}
+
+sv_reg_t sv_proc_t::to_uint32(sv_float32_t const& reg)
+{
+    return sv_reg_t(reg.to_uint32());
+}
+
+// ------
+
 uint64_t sv_freg_t::to_uint64() const&
 {
     return reg.v[0];

diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index 6314c4c6c96a14670b7daa0efec9ad81660030e8..839ae02fedd62fc8cbda0aab13e1a4bb8c712273 100644 (file)
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -252,6 +252,10 @@ public:
                    size_t width, reg_t val);
 
 
+    sv_reg_t to_uint64(sv_freg_t const& reg);
+    sv_reg_t to_uint32(sv_freg_t const& reg);
+    sv_reg_t to_uint32(sv_float32_t const& reg);
+
 #include "sv_insn_decl.h"
 };