* arm.md (pic_load_addr): Add constraints to operand 1.

From-SVN: r30170

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 94a72a6ff3437b15cb2cb9b7570a73742f9b4cdc..fcabdd8fef8405102c45e429ebfa375d9ec1212e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,11 @@
+Mon Oct 25 22:08:35 1999  Richard Earnshaw (rearnsha@arm.com)
+
+       * arm.md (pic_load_addr): Add constraints to operand 1.
+
 1999-10-25  Bruce Korb  <autogen@linuxbox.com>
 
-       * fixinc/genfixes:  Provide a means for specifying -D options to AutoGen
+       * fixinc/genfixes:  Provide a means for specifying -D options to
+       AutoGen
 
 Mon Oct 25 00:42:35 1999  Jeffrey A Law  (law@cygnus.com)
 

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 30673bbb4bd0435262c791ab7ae2fd2b8b2128a3..88d42069bf01594def594500b95a14958d29ee7a 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -2858,16 +2858,20 @@
           && GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT))"
   "adr%?\\t%0, %a1")
 
-/* When generating pic, we need to load the symbol offset into a register.
-   So that the optimizer does not confuse this with a normal symbol load
-   we use an unspec.  The offset will be loaded from a constant pool entry,
-   since that is the only type of relocation we can use.  */
+;; When generating pic, we need to load the symbol offset into a register.
+;; So that the optimizer does not confuse this with a normal symbol load
+;; we use an unspec.  The offset will be loaded from a constant pool entry,
+;; since that is the only type of relocation we can use.
+
+;; The rather odd constraints on the following are to force reload to leave
+;; the insn alone, and to force the minipool generation pass to then move
+;; the GOT symbol to memory.
 
 (define_insn "pic_load_addr"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
-       (unspec:SI [(match_operand 1 "" "")] 3))]
+       (unspec:SI [(match_operand:SI 1 "" "mX")] 3))]
   "flag_pic"
-  "ldr%?\\t%0, %a1"
+  "ldr%?\\t%0, %1"
  [(set_attr "type" "load")
   (set_attr "pool_range" "4096")])