zero_bits_compound-2.c: Fix test for aarch64.

2016-11-30  Michael Collison  <michael.collison@arm.com>

	* gcc.dg/zero_bits_compound-2.c: Fix test for aarch64.

From-SVN: r244348

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c8c9c628e0a690c08dedc2b2f6b050f7b80d91e4..b10c036071090e3f303a61b8ca1c82a98d873a57 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2017-01-12  Michael Collison  <michael.collison@arm.com>
+
+       * gcc.dg/zero_bits_compound-2.c: Fix test for aarch64.
+
 2017-01-11  Julia Koval  <julia.koval@intel.com>
            Uros Bizjak  <ubizjak@gmail.com>
 

diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c
index f6c390a3941574b9d36fffb90f8ec531645293d6..64e6744b7924b19b70d363f458314cbf3931ae83 100644 (file)
--- a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c
+++ b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */
 /* { dg-require-effective-target lp64 } */
-/* { dg-options "-O3 -dP" } */
+/* { dg-options "-O3 -dP -fdump-rtl-combine" } */
 
 unsigned long foo (unsigned char c)
 {
@@ -36,4 +36,6 @@ unsigned long bar (unsigned char c)
 }
 
 /* Check that an AND expression was used.  */
-/* { dg-final { scan-assembler-times "\\(and:" 2 } } */
+/* { dg-final { scan-assembler-times "\\(and:" 2 { target { ! aarch64*-*-* } } } } */
+/* { dg-final { scan-rtl-dump "\\(and:DI" "combine" { target aarch64*-*-* } } } */
+/* { dg-final { scan-rtl-dump "\\(and:SI" "combine" { target aarch64*-*-* } } } */