i965: Add new brw_context::max_gs_threads constant.

These are correct to the best of my knowledge, gleaned from a variety of
internal sources.  Sadly, the Sandybridge PRM has incorrect limits.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 661b14f1dd86614993c308be9ed0adb1e3a0f4d1..d2400b9ffb7a12848f06ca1ecbe48bb58365675e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -192,12 +192,14 @@ brwCreateContext(int api,
       if (intel->gt == 1) {
         brw->max_wm_threads = 86;
         brw->max_vs_threads = 36;
+        brw->max_gs_threads = 36;
         brw->urb.size = 128;
         brw->urb.max_vs_entries = 512;
         brw->urb.max_gs_entries = 192;
       } else if (intel->gt == 2) {
         brw->max_wm_threads = 86;
         brw->max_vs_threads = 128;
+        brw->max_gs_threads = 128;
         brw->urb.size = 256;
         brw->urb.max_vs_entries = 704;
         brw->urb.max_gs_entries = 320;
@@ -212,25 +214,30 @@ brwCreateContext(int api,
          */
         brw->max_wm_threads = 40;
         brw->max_vs_threads = 60;
+        brw->max_gs_threads = 60;
         brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
         brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
       } else {
         brw->max_wm_threads = 40;
         brw->max_vs_threads = 24;
+        brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
         brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
         brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
       }
    } else if (intel->gen == 5) {
       brw->urb.size = 1024;
       brw->max_vs_threads = 72;
+      brw->max_gs_threads = 32;
       brw->max_wm_threads = 12 * 6;
    } else if (intel->is_g4x) {
       brw->urb.size = 384;
       brw->max_vs_threads = 32;
+      brw->max_gs_threads = 2;
       brw->max_wm_threads = 10 * 5;
    } else if (intel->gen < 6) {
       brw->urb.size = 256;
       brw->max_vs_threads = 16;
+      brw->max_gs_threads = 2;
       brw->max_wm_threads = 8 * 4;
       brw->has_negative_rhw_bug = true;
    }

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index f19bf31343eee21f982a54047a412f6f8ab32d57..ff25b093b47f862fc684e81f4f1ca64ae26fb93c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -672,6 +672,7 @@ struct brw_context
     * for each pipeline stage.
     */
    int max_vs_threads;
+   int max_gs_threads;
    int max_wm_threads;
 
    /* BRW_NEW_URB_ALLOCATIONS: