projects / yosys.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (from: f19aa8d)
If d_bit already in sigbit_chain_next, create extra wire
authorEddie Hung <eddie@fpgeh.com>
Mon, 10 Jun 2019 23:16:40 +0000 (16:16 -0700)
committerEddie Hung <eddie@fpgeh.com>
Mon, 10 Jun 2019 23:16:40 +0000 (16:16 -0700)

No differences found