RISC-V: Remove RV64E conflict

Since RV32E *and* RV64E are ratified, RV64E is no longer invalid.

This commit removes a restriction that prevents making base ISA with
reduced GPRs with XLEN > 32.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_parse_check_conflicts): Remove RV64E
	conflict since the ratified 'E' base ISAs include RV64E.

gas/ChangeLog:

	* testsuite/gas/riscv/march-fail-base-02.d: Removed.
	* testsuite/gas/riscv/march-fail-base-02.l: Removed.

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 6ed657171f0fb4a71022a166e2a790c5f2503bd5..c070394a36671aae0b033292adeac80b90f6477c 100644 (file)
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1945,13 +1945,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
   int xlen = *rps->xlen;
   bool no_conflict = true;
 
-  if (riscv_lookup_subset (rps->subset_list, "e", &subset)
-      && xlen > 32)
-    {
-      rps->error_handler
-       (_("rv%d does not support the `e' extension"), xlen);
-      no_conflict = false;
-    }
   if (riscv_subset_supports (rps, "e")
       && riscv_subset_supports (rps, "h"))
     {

diff --git a/gas/testsuite/gas/riscv/march-fail-base-02.d b/gas/testsuite/gas/riscv/march-fail-base-02.d
deleted file mode 100644 (file)
index cfe085a..0000000
--- a/gas/testsuite/gas/riscv/march-fail-base-02.d
+++ /dev/null
@@ -1,3 +0,0 @@
-#as: -march=rv64e
-#source: empty.s
-#error_output: march-fail-base-02.l

diff --git a/gas/testsuite/gas/riscv/march-fail-base-02.l b/gas/testsuite/gas/riscv/march-fail-base-02.l
deleted file mode 100644 (file)
index 52fee96..0000000
--- a/gas/testsuite/gas/riscv/march-fail-base-02.l
+++ /dev/null
@@ -1,2 +0,0 @@
-.*Assembler messages:
-.*Error: rv64 does not support the `e' extension