radeonsi: drop some cayman remnants

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <deathsimple@vodafone.de>

diff --git a/src/gallium/drivers/radeonsi/r600.h b/src/gallium/drivers/radeonsi/r600.h
index c2c22c4d84c96776a57a9cea05b31dcdfa5b4fd0..7a8ff1015d4189204dc9e0eed2c9df47e80df44c 100644 (file)
--- a/src/gallium/drivers/radeonsi/r600.h
+++ b/src/gallium/drivers/radeonsi/r600.h
@@ -39,7 +39,6 @@ struct winsys_handle;
 
 enum radeon_family {
        CHIP_UNKNOWN,
-       CHIP_CAYMAN,
        CHIP_TAHITI,
        CHIP_PITCAIRN,
        CHIP_VERDE,
@@ -47,7 +46,6 @@ enum radeon_family {
 };
 
 enum chip_class {
-       CAYMAN,
        TAHITI,
 };
 

diff --git a/src/gallium/drivers/radeonsi/r600_hw_context.c b/src/gallium/drivers/radeonsi/r600_hw_context.c
index 685f1951738a88f4442cb5f00286751197d5c6c0..6f816dc61dff3a3d3cc8cf4b09a6085e9ca9af5f 100644 (file)
--- a/src/gallium/drivers/radeonsi/r600_hw_context.c
+++ b/src/gallium/drivers/radeonsi/r600_hw_context.c
@@ -45,12 +45,7 @@ void si_get_backend_mask(struct r600_context *ctx)
        if (ctx->screen->info.r600_backend_map_valid) {
                unsigned num_tile_pipes = ctx->screen->info.r600_num_tile_pipes;
                unsigned backend_map = ctx->screen->info.r600_backend_map;
-               unsigned item_width, item_mask;
-
-               if (ctx->chip_class >= CAYMAN) {
-                       item_width = 4;
-                       item_mask = 0x7;
-               }
+               unsigned item_width = 4, item_mask = 0x7;
 
                while(num_tile_pipes--) {
                        i = backend_map & item_mask;

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index b6b23065b94e32f923cbebad16735c9fcb6ce136..b6e37fb6f552dcd1520a13528c0bad43f194d59e 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1801,18 +1801,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
        tl_y = 0;
        br_x = state->width;
        br_y = state->height;
-#if 0 /* These shouldn't be necessary on SI, see PA_SC_ENHANCE register */
-       /* EG hw workaround */
-       if (br_x == 0)
-               tl_x = 1;
-       if (br_y == 0)
-               tl_y = 1;
-       /* cayman hw workaround */
-       if (rctx->chip_class == CAYMAN) {
-               if (br_x == 1 && br_y == 1)
-                       br_x = 2;
-       }
-#endif
+
        tl = S_028240_TL_X(tl_x) | S_028240_TL_Y(tl_y);
        br = S_028244_BR_X(br_x) | S_028244_BR_Y(br_y);
 

diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 3410eb668fd3b557e7090a352f6242e7234c6ae9..2e17d90494e8146bda50753f5c3364a38eee35a6 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -56,10 +56,8 @@ void si_context_streamout_begin(struct r600_context *ctx)
                           util_bitcount(buffer_en & ~ctx->streamout_append_bitmask) * 6 +
                           ctx->num_cs_dw_streamout_end, TRUE);
 
-       if (ctx->chip_class >= CAYMAN) {
-               evergreen_flush_vgt_streamout(ctx);
-               evergreen_set_streamout_enable(ctx, buffer_en);
-       }
+       evergreen_flush_vgt_streamout(ctx);
+       evergreen_set_streamout_enable(ctx, buffer_en);
 
        for (i = 0; i < ctx->num_so_targets; i++) {
 #if 0