add openpower major opcodes table from anton blanchards microwatt

diff --git a/openpower/isatables.mdwn b/openpower/isatables.mdwn
index 260c6e81db1fc5fd822c054c9c536c93996b4acb..523cd905895bc4c574b8f1b3f1d8dd208b822662 100644 (file)
--- a/openpower/isatables.mdwn
+++ b/openpower/isatables.mdwn
@@ -1,3 +1,8 @@
 # ISA Reference Tables
 
 TODO
+
+## Major opcodes
+
+[[!table format=csv file="/openpower/isatables/major.csv"]]
+

diff --git a/openpower/isatables/major.csv b/openpower/isatables/major.csv
new file mode 100644 (file)
index 0000000..3c01ccd
--- /dev/null
+++ b/openpower/isatables/major.csv
@@ -0,0 +1,35 @@
+"--", unit,     internal op,   in1,         in2,         in3,  out,  CR in, CR out,  inv A, inv out, cry in, cry out, ldst len, BR,   sgn ext, upd,  rsrv, 32b, sgn,  rc,  lk,   sgl pipe
+"12", "ALU",    "OP_ADD",       RA,         CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '1', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "addic"
+"13", "ALU",    "OP_ADD",       RA,         CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '1', NONE, '0', '0', '0', '0', '0', '0', ONE,  '0', '0', "addic."
+"14", "ALU",    "OP_ADD",       RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "addi"
+"15", "ALU",    "OP_ADD",       RA_OR_ZERO, CONST_SI_HI, NONE, RT,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "addis"
+"28", "ALU",    "OP_AND",       NONE,       CONST_UI,    RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', ONE,  '0', '0', "andi."
+"29", "ALU",    "OP_AND",       NONE,       CONST_UI_HI, RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', ONE,  '0', '0', "andis."
+"18", "ALU",    "OP_B",         NONE,       CONST_LI,    NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '1', '0', "b"
+"16", "ALU",    "OP_BC",        SPR,        CONST_BD,    NONE, SPR , '1', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '1', '0', "bc"
+"11", "ALU",    "OP_CMP",       RA,         CONST_SI,    NONE, NONE, '0', '1', '1', '0', ONE,  '0', NONE, '0', '0', '0', '0', '0', '1', NONE, '0', '0', "cmpi"
+"10", "ALU",    "OP_CMP",       RA,         CONST_UI,    NONE, NONE, '0', '1', '1', '0', ONE,  '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "cmpli"
+"34", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is1B, '0', '0', '0', '0', '0', '0', NONE, '0', '1', "lbz"
+"35", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is1B, '0', '0', '1', '0', '0', '0', NONE, '0', '1', "lbzu"
+"42", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is2B, '0', '1', '0', '0', '0', '0', NONE, '0', '1', "lha"
+"43", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is2B, '0', '1', '1', '0', '0', '0', NONE, '0', '1', "lhau"
+"40", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is2B, '0', '0', '0', '0', '0', '0', NONE, '0', '1', "lhz"
+"41", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is2B, '0', '0', '1', '0', '0', '0', NONE, '0', '1', "lhzu"
+"32", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is4B, '0', '0', '0', '0', '0', '0', NONE, '0', '1', "lwz"
+"33", "LDST",   "OP_LOAD",      RA_OR_ZERO, CONST_SI,    NONE, RT,   '0', '0', '0', '0', ZERO, '0', is4B, '0', '0', '1', '0', '0', '0', NONE, '0', '1', "lwzu"
+" 7", "ALU",    "OP_MUL_L64",   RA,         CONST_SI,    NONE, RT,   '0', '1', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '1', NONE, '0', '0', "mulli"
+"24", "ALU",    "OP_OR",        NONE,       CONST_UI,    RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "ori"
+"25", "ALU",    "OP_OR",        NONE,       CONST_UI_HI, RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "oris"
+"20", "ALU",    "OP_RLC",       RA,         CONST_SH32,  RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '1', '0', RC,   '0', '0', "rlwimi"
+"21", "ALU",    "OP_RLC",       NONE,       CONST_SH32,  RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '1', '0', RC,   '0', '0', "rlwinm"
+"23", "ALU",    "OP_RLC",       NONE,       RB,          RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '1', '0', RC,   '0', '0', "rlwnm"
+"38", "LDST",   "OP_STORE",     RA_OR_ZERO, CONST_SI,    RS,   NONE, '0', '0', '0', '0', ZERO, '0', is1B, '0', '0', '0', '0', '0', '0', RC,   '0', '1', "stb"
+"39", "LDST",   "OP_STORE",     RA_OR_ZERO, CONST_SI,    RS,   NONE, '0', '0', '0', '0', ZERO, '0', is1B, '0', '0', '1', '0', '0', '0', RC,   '0', '1', "stbu"
+"44", "LDST",   "OP_STORE",     RA_OR_ZERO, CONST_SI,    RS,   NONE, '0', '0', '0', '0', ZERO, '0', is2B, '0', '0', '0', '0', '0', '0', NONE, '0', '1', "sth"
+"45", "LDST",   "OP_STORE",     RA_OR_ZERO, CONST_SI,    RS,   NONE, '0', '0', '0', '0', ZERO, '0', is2B, '0', '0', '1', '0', '0', '0', NONE, '0', '1', "sthu"
+"36", "LDST",   "OP_STORE",     RA_OR_ZERO, CONST_SI,    RS,   NONE, '0', '0', '0', '0', ZERO, '0', is4B, '0', '0', '0', '0', '0', '0', NONE, '0', '1', "stw"
+"37", "LDST",   "OP_STORE",     RA_OR_ZERO, CONST_SI,    RS,   NONE, '0', '0', '0', '0', ZERO, '0', is4B, '0', '0', '1', '0', '0', '0', NONE, '0', '1', "stwu"
+" 8", "ALU",    "OP_ADD",       RA,         CONST_SI,    NONE, RT,   '0', '0', '1', '0', ONE,  '1', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "subfic"
+" 2", "ALU",    "OP_TDI",       RA,         CONST_SI,    NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1', "tdi"
+"26", "ALU",    "OP_XOR",       NONE,       CONST_UI,    RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "xori"
+"27", "ALU",    "OP_XOR",       NONE,       CONST_UI_HI, RS,   RA,   '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', "xoris"