+2004-02-01 Kazu Hirata <kazu@cs.umass.edu>
+
+ * config/arm/arm.c, config/arm/arm.h, config/arm/arm.md,
+ config/arm/linux-gas.h, config/arm/netbsd-elf.h,
+ config/arm/netbsd.h, config/arm/pe.c, config/avr/avr.c,
+ config/avr/avr.h, config/avr/avr.md, config/c4x/c4x.h,
+ config/cris/cris.h, config/fr30/fr30.h, config/frv/frv.c,
+ config/frv/frv.h, config/ip2k/ip2k.c, config/iq2000/iq2000.c,
+ config/iq2000/iq2000.h, config/m32r/m32r.c,
+ config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h,
+ config/m68hc11/m68hc11.md, config/m68k/m68k.md,
+ config/mcore/mcore.c, config/mcore/mcore.h,
+ config/mcore/mcore.md, config/mips/mips.c,
+ config/ns32k/ns32k.h, config/ns32k/ns32k.md,
+ config/rs6000/rs6000.c, config/s390/s390.c,
+ config/s390/s390.md, config/sparc/sparc.c, config/v850/v850.c,
+ config/xtensa/xtensa.h, config/xtensa/xtensa.md: Replace
+ "gen_rtx (FOO, " with "gen_rtx_FOO (".
+
2004-02-01 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (two peephole2's): New.
if (regno > LAST_LO_REGNUM) /* Very unlikely. */
{
- rtx spare = gen_rtx (REG, SImode, IP_REGNUM);
+ rtx spare = gen_rtx_REG (SImode, IP_REGNUM);
/* Choose an arbitrary, non-argument low register. */
- reg = gen_rtx (REG, SImode, LAST_LO_REGNUM);
+ reg = gen_rtx_REG (SImode, LAST_LO_REGNUM);
/* Save it by copying it into a high, scratch register. */
emit_insn (gen_movsi (spare, reg));
}
else
{
- reg = gen_rtx (REG, SImode, regno);
+ reg = gen_rtx_REG (SImode, regno);
emit_insn (gen_movsi (reg, GEN_INT (- amount)));
else
{
/* r3 is always free in the epilogue. */
- rtx reg = gen_rtx (REG, SImode, LAST_ARG_REGNUM);
+ rtx reg = gen_rtx_REG (SImode, LAST_ARG_REGNUM);
emit_insn (gen_movsi (reg, GEN_INT (amount)));
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg));
switch (GET_CODE (addr))
{
case REG:
- operands[2] = gen_rtx (MEM, SImode,
- plus_constant (XEXP (operands[1], 0), 4));
+ operands[2] = gen_rtx_MEM (SImode,
+ plus_constant (XEXP (operands[1], 0), 4));
if (REGNO (operands[0]) == REGNO (addr))
{
case CONST:
/* Compute <address> + 4 for the high order load. */
- operands[2] = gen_rtx (MEM, SImode,
- plus_constant (XEXP (operands[1], 0), 4));
+ operands[2] = gen_rtx_MEM (SImode,
+ plus_constant (XEXP (operands[1], 0), 4));
output_asm_insn ("ldr\t%0, %1", operands);
output_asm_insn ("ldr\t%H0, %2", operands);
else
{
/* Compute <address> + 4 for the high order load. */
- operands[2] = gen_rtx (MEM, SImode,
- plus_constant (XEXP (operands[1], 0), 4));
+ operands[2] = gen_rtx_MEM (SImode,
+ plus_constant (XEXP (operands[1], 0), 4));
/* If the computed address is held in the low order register
then load the high order register first, otherwise always
case LABEL_REF:
/* With no registers to worry about we can just load the value
directly. */
- operands[2] = gen_rtx (MEM, SImode,
- plus_constant (XEXP (operands[1], 0), 4));
+ operands[2] = gen_rtx_MEM (SImode,
+ plus_constant (XEXP (operands[1], 0), 4));
output_asm_insn ("ldr\t%H0, %2", operands);
output_asm_insn ("ldr\t%0, %1", operands);
if (len >= 4)
{
rtx reg = gen_reg_rtx (SImode);
- emit_insn (gen_movsi (reg, gen_rtx (MEM, SImode, in)));
- emit_insn (gen_movsi (gen_rtx (MEM, SImode, out), reg));
+ emit_insn (gen_movsi (reg, gen_rtx_MEM (SImode, in)));
+ emit_insn (gen_movsi (gen_rtx_MEM (SImode, out), reg));
len -= 4;
offset += 4;
}
if (len >= 2)
{
rtx reg = gen_reg_rtx (HImode);
- emit_insn (gen_movhi (reg, gen_rtx (MEM, HImode,
- plus_constant (in, offset))));
- emit_insn (gen_movhi (gen_rtx (MEM, HImode, plus_constant (out, offset)),
+ emit_insn (gen_movhi (reg, gen_rtx_MEM (HImode,
+ plus_constant (in, offset))));
+ emit_insn (gen_movhi (gen_rtx_MEM (HImode, plus_constant (out, offset)),
reg));
len -= 2;
offset += 2;
if (len)
{
rtx reg = gen_reg_rtx (QImode);
- emit_insn (gen_movqi (reg, gen_rtx (MEM, QImode,
- plus_constant (in, offset))));
- emit_insn (gen_movqi (gen_rtx (MEM, QImode, plus_constant (out, offset)),
+ emit_insn (gen_movqi (reg, gen_rtx_MEM (QImode,
+ plus_constant (in, offset))));
+ emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (out, offset)),
reg));
}
}
assemble_name (STREAM, ARM_MCOUNT_NAME); \
fputc ('\n', STREAM); \
ASM_GENERATE_INTERNAL_LABEL (temp, "LP", LABELNO); \
- sym = gen_rtx (SYMBOL_REF, Pmode, temp); \
+ sym = gen_rtx_SYMBOL_REF (Pmode, temp); \
assemble_aligned_integer (UNITS_PER_WORD, sym); \
}
#endif
case 5:
return thumb_load_double_from_address (operands);
case 6:
- operands[2] = gen_rtx (MEM, SImode,
+ operands[2] = gen_rtx_MEM (SImode,
plus_constant (XEXP (operands[0], 0), 4));
output_asm_insn (\"str\\t%1, %0\;str\\t%H1, %2\", operands);
return \"\";
if (GET_CODE (operands[0]) != REG)
abort ();
- operands[0] = gen_rtx (SUBREG, SImode, operands[0], 0);
+ operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
DONE;
}
case 3:
return thumb_load_double_from_address (operands);
case 4:
- operands[2] = gen_rtx (MEM, SImode,
- plus_constant (XEXP (operands[0], 0), 4));
+ operands[2] = gen_rtx_MEM (SImode,
+ plus_constant (XEXP (operands[0], 0), 4));
output_asm_insn (\"str\\t%1, %0\;str\\t%H1, %2\", operands);
return \"\";
case 5:
enum rtx_code rc = GET_CODE (operands[1]);
operands[6] = gen_rtx_REG (mode, CC_REGNUM);
- operands[7] = gen_rtx (COMPARE, mode, operands[2], operands[3]);
+ operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
if (mode == CCFPmode || mode == CCFPEmode)
rc = reverse_condition_maybe_unordered (rc);
else
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
do \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
idp = get_identifier (newname);
XEXP (DECL_RTL (decl), 0) =
- gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
+ gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
}
/* Mark a DECL as being dllimport'd. */
/* ??? At least I think that's why we do this. */
idp = get_identifier (newname);
- newrtl = gen_rtx (MEM, Pmode,
- gen_rtx (SYMBOL_REF, Pmode,
- IDENTIFIER_POINTER (idp)));
+ newrtl = gen_rtx_MEM (Pmode,
+ gen_rtx_SYMBOL_REF (Pmode,
+ IDENTIFIER_POINTER (idp)));
XEXP (DECL_RTL (decl), 0) = newrtl;
}
{
const char *oldname = XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0);
tree idp = get_identifier (oldname + 9);
- rtx newrtl = gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
+ rtx newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
XEXP (DECL_RTL (decl), 0) = newrtl;
/* Allocate registers from r25 to r8 for parameters for function calls. */
#define FIRST_CUM_REG 26
-/* Temporary register RTX (gen_rtx (REG,QImode,TMP_REGNO)) */
+/* Temporary register RTX (gen_rtx_REG (QImode, TMP_REGNO)) */
static GTY(()) rtx tmp_reg_rtx;
-/* Zeroed register RTX (gen_rtx (REG,QImode,ZERO_REGNO)) */
+/* Zeroed register RTX (gen_rtx_REG (QImode, ZERO_REGNO)) */
static GTY(()) rtx zero_reg_rtx;
/* AVR register names {"r0", "r1", ..., "r31"} */
int bytes = avr_num_arg_regs (mode, type);
if (cum->nregs && bytes <= cum->nregs)
- return gen_rtx (REG, mode, cum->regno - bytes);
+ return gen_rtx_REG (mode, cum->regno - bytes);
return NULL_RTX;
}
/* No scratch register available, use one from LD_REGS (saved in
__tmp_reg__) that doesn't overlap with registers to shift. */
- op[3] = gen_rtx (REG, QImode,
+ op[3] = gen_rtx_REG (QImode,
((true_regnum (operands[0]) - 1) & 15) + 16);
op[4] = tmp_reg_rtx;
saved_in_tmp = 1;
rtx t = XEXP (src,0);
PUT_CODE (t, swap_condition (GET_CODE (t)));
- SET_SRC (pattern) = gen_rtx (NEG,
- GET_MODE (SET_SRC (pattern)),
- SET_SRC (pattern));
+ SET_SRC (pattern) = gen_rtx_NEG (GET_MODE (SET_SRC (pattern)),
+ SET_SRC (pattern));
INSN_CODE (next) = -1;
INSN_CODE (insn) = -1;
}
int offs = GET_MODE_SIZE (mode);
if (offs < 2)
offs = 2;
- return gen_rtx (REG, mode, RET_REGISTER + 2 - offs);
+ return gen_rtx_REG (mode, RET_REGISTER + 2 - offs);
}
/* Create an RTX representing the place where a
else if (offs > GET_MODE_SIZE (SImode) && offs < GET_MODE_SIZE (DImode))
offs = GET_MODE_SIZE (DImode);
- return gen_rtx (REG, BLKmode, RET_REGISTER + 2 - offs);
+ return gen_rtx_REG (BLKmode, RET_REGISTER + 2 - offs);
}
/* Returns nonzero if the number MASK has only one bit set. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
- emit_move_insn (gen_rtx (MEM, HImode, plus_constant ((TRAMP), 2)), CXT); \
- emit_move_insn (gen_rtx (MEM, HImode, plus_constant ((TRAMP), 6)), FNADDR); \
+ emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
+ emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
}
/* Store in cc_status the expressions
that the condition codes will describe
operands[5] = addr0;
operands[6] = addr1;
- operands[0] = gen_rtx (MEM, BLKmode, addr0);
- operands[1] = gen_rtx (MEM, BLKmode, addr1);
+ operands[0] = gen_rtx_MEM (BLKmode, addr0);
+ operands[1] = gen_rtx_MEM (BLKmode, addr1);
}")
(define_insn "*movstrqi_insn"
addr0 = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
operands[4] = addr0;
- operands[0] = gen_rtx (MEM, BLKmode, addr0);
+ operands[0] = gen_rtx_MEM (BLKmode, addr0);
}")
(define_insn "*clrstrqi"
if (! (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 0))
FAIL;
addr = copy_to_mode_reg (Pmode, XEXP (operands[1],0));
- operands[1] = gen_rtx (MEM, BLKmode, addr);
+ operands[1] = gen_rtx_MEM (BLKmode, addr);
operands[5] = addr;
operands[4] = gen_reg_rtx (HImode);
}")
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x5069), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
- emit_move_insn (gen_rtx (MEM, QImode, \
+ emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 0)), tmp1); \
tmp1 = expand_and (QImode, FNADDR, GEN_INT (0xffff), 0); \
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x1069), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
- emit_move_insn (gen_rtx (MEM, QImode, \
+ emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 2)), tmp1); \
tmp1 = expand_shift (RSHIFT_EXPR, QImode, CXT, \
size_int (16), 0, 1); \
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x5068), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
- emit_move_insn (gen_rtx (MEM, QImode, \
+ emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 3)), tmp1); \
tmp1 = expand_and (QImode, CXT, GEN_INT (0xffff), 0); \
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x1068), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
- emit_move_insn (gen_rtx (MEM, QImode, \
+ emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 6)), tmp1); \
} \
else \
{ \
- emit_move_insn (gen_rtx (MEM, QImode, \
+ emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (TRAMP, 8)), FNADDR); \
- emit_move_insn (gen_rtx (MEM, QImode, \
+ emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (TRAMP, 9)), CXT); \
} \
}
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
cris_return_addr_rtx (COUNT, FRAMEADDR)
-#define INCOMING_RETURN_ADDR_RTX gen_rtx (REG, Pmode, CRIS_SRP_REGNUM)
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CRIS_SRP_REGNUM)
/* FIXME: Any __builtin_eh_return callers must not return anything and
there must not be collisions with incoming parameters. Luckily the
((CUM).regs < CRIS_MAX_ARGS_IN_REGS \
&& (TYPE) != void_type_node \
&& ! FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED) \
- ? gen_rtx (REG, MODE, (CRIS_FIRST_ARG_REG) + (CUM).regs) \
+ ? gen_rtx_REG (MODE, (CRIS_FIRST_ARG_REG) + (CUM).regs) \
: NULL_RTX)
/* The differences between this and the previous, is that this one checks
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
(((NAMED) && (CUM).regs < CRIS_MAX_ARGS_IN_REGS \
&& ! FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED)) \
- ? gen_rtx (REG, MODE, CRIS_FIRST_ARG_REG + (CUM).regs) \
+ ? gen_rtx_REG (MODE, CRIS_FIRST_ARG_REG + (CUM).regs) \
: NULL_RTX)
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
time being. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), CRIS_FIRST_ARG_REG)
+ gen_rtx_REG (TYPE_MODE (VALTYPE), CRIS_FIRST_ARG_REG)
-#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, CRIS_FIRST_ARG_REG)
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, CRIS_FIRST_ARG_REG)
#define FUNCTION_VALUE_REGNO_P(N) ((N) == CRIS_FIRST_ARG_REG)
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
do \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, \
+ emit_move_insn (gen_rtx_MEM (SImode, \
plus_constant (TRAMP, 10)), \
CXT); \
- emit_move_insn (gen_rtx (MEM, SImode, \
+ emit_move_insn (gen_rtx_MEM (SImode, \
plus_constant (TRAMP, 16)), \
FNADDR); \
} \
( (NAMED) == 0 ? NULL_RTX \
: MUST_PASS_IN_STACK (MODE, TYPE) ? NULL_RTX \
: (CUM) >= FR30_NUM_ARG_REGS ? NULL_RTX \
- : gen_rtx (REG, MODE, CUM + FIRST_ARG_REGNUM))
+ : gen_rtx_REG (MODE, CUM + FIRST_ARG_REGNUM))
/* A C type for declaring a variable that is used as the first argument of
`FUNCTION_ARG' and other related values. For some target machines, the type
The definition of `LIBRARY_VALUE' need not be concerned aggregate data
types, because none of the library functions returns such types. */
-#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RETURN_VALUE_REGNUM)
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
/* A C expression that is nonzero if REGNO is the number of a hard register in
which the values of called function may come back. */
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
do \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant (ADDR, 4)), STATIC_CHAIN);\
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant (ADDR, 12)), FNADDR); \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (ADDR, 4)), STATIC_CHAIN);\
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (ADDR, 12)), FNADDR); \
} while (0);
/*}}}*/ \f
fprintf (stderr, "expand_builtin_saveregs: offset from ap = %d\n",
offset);
- return gen_rtx (PLUS, Pmode, virtual_incoming_args_rtx, GEN_INT (- offset));
+ return gen_rtx_PLUS (Pmode, virtual_incoming_args_rtx, GEN_INT (- offset));
}
\f
else if (arg_num <= LAST_ARG_REGNUM)
{
- ret = gen_rtx (REG, xmode, arg_num);
+ ret = gen_rtx_REG (xmode, arg_num);
debstr = reg_names[arg_num];
}
because these are returned in another way. See
`TARGET_STRUCT_VALUE_RTX' and related macros, below. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM)
+ gen_rtx_REG (TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM)
/* A C expression to create an RTX representing the place where a library
function returns a value of mode MODE.
The definition of `LIBRARY_VALUE' need not be concerned aggregate data
types, because none of the library functions returns such types. */
-#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RETURN_VALUE_REGNUM)
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
/* A C expression that is nonzero if REGNO is the number of a hard register in
which the values of called function may come back.
+ GET_MODE_SIZE (GET_MODE (XEXP (set, 0))));
*dp_current = gen_rtx_MEM (HImode,
gen_rtx_PLUS (Pmode,
- gen_rtx_REG(HImode, REG_SP),
+ gen_rtx_REG (HImode, REG_SP),
GEN_INT (disp)));
return 1;
}
if (test == ITEST_NE)
{
- convert_move (result, gen_rtx (GTU, mode, reg, const0_rtx), 0);
+ convert_move (result, gen_rtx_GTU (mode, reg, const0_rtx), 0);
if (p_invert != NULL)
*p_invert = 0;
invert = 0;
rtx one;
one = const1_rtx;
- convert_move (result, gen_rtx (XOR, mode, reg, one), 0);
+ convert_move (result, gen_rtx_XOR (mode, reg, one), 0);
}
return result;
if (mode == VOIDmode)
{
if (cum->num_adjusts > 0)
- ret = gen_rtx (PARALLEL, (enum machine_mode) cum->fp_code,
+ ret = gen_rtx_PARALLEL ((enum machine_mode) cum->fp_code,
gen_rtvec_v (cum->num_adjusts, cum->adjust));
}
{
rtx reg_rtx;
rtx mem_rtx
- = gen_rtx (MEM, gpr_mode,
- gen_rtx (PLUS, Pmode, base_reg_rtx,
+ = gen_rtx_MEM (gpr_mode,
+ gen_rtx_PLUS (Pmode, base_reg_rtx,
GEN_INT (gp_offset - base_offset)));
if (! current_function_calls_eh_return)
RTX_UNCHANGING_P (mem_rtx) = 1;
- reg_rtx = gen_rtx (REG, gpr_mode, regno);
+ reg_rtx = gen_rtx_REG (gpr_mode, regno);
if (store_p)
iq2000_emit_frame_related_store (mem_rtx, reg_rtx, gp_offset);
for (; regno <= GP_ARG_LAST; regno++)
{
if (offset != 0)
- ptr = gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (offset));
- emit_move_insn (gen_rtx (MEM, gpr_mode, ptr),
- gen_rtx (REG, gpr_mode, regno));
+ ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
+ emit_move_insn (gen_rtx_MEM (gpr_mode, ptr),
+ gen_rtx_REG (gpr_mode, regno));
offset += GET_MODE_SIZE (gpr_mode);
}
if (tsize > 32767)
{
- adjustment_rtx = gen_rtx (REG, Pmode, IQ2000_TEMP1_REGNUM);
+ adjustment_rtx = gen_rtx_REG (Pmode, IQ2000_TEMP1_REGNUM);
emit_move_insn (adjustment_rtx, tsize_rtx);
}
else
if (current_function_calls_eh_return)
{
/* Perform the additional bump for __throw. */
- emit_move_insn (gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM),
+ emit_move_insn (gen_rtx_REG (Pmode, HARD_FRAME_POINTER_REGNUM),
stack_pointer_rtx);
- emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, Pmode,
+ emit_insn (gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode,
HARD_FRAME_POINTER_REGNUM)));
emit_jump_insn (gen_eh_return_internal ());
}
else
- emit_jump_insn (gen_return_internal (gen_rtx (REG, Pmode,
+ emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode,
GP_REG_FIRST + 31)));
}
#define FUNCTION_VALUE(VALTYPE, FUNC) iq2000_function_value (VALTYPE, FUNC)
-#define LIBCALL_VALUE(MODE) \
- gen_rtx (REG, \
- ((GET_MODE_CLASS (MODE) != MODE_INT \
- || GET_MODE_SIZE (MODE) >= 4) \
- ? (MODE) \
- : SImode), \
- GP_RETURN)
+#define LIBCALL_VALUE(MODE) \
+ gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
+ || GET_MODE_SIZE (MODE) >= 4) \
+ ? (MODE) \
+ : SImode), \
+ GP_RETURN)
/* On the IQ2000, R2 and R3 are the only register thus used. */
{ \
X = gen_rtx_LO_SUM (Pmode, \
copy_to_mode_reg (Pmode, \
- gen_rtx (HIGH, Pmode, X)), \
+ gen_rtx_HIGH (Pmode, X)), \
X); \
goto WIN; \
} \
break;
case GT:
if (GET_CODE (y) == CONST_INT)
- tmp = gen_rtx (PLUS, SImode, y, const1_rtx);
+ tmp = gen_rtx_PLUS (SImode, y, const1_rtx);
else
emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
emit_insn (gen_cmp_ltsi_insn (x, tmp));
break;
case GTU:
if (GET_CODE (y) == CONST_INT)
- tmp = gen_rtx (PLUS, SImode, y, const1_rtx);
+ tmp = gen_rtx_PLUS (SImode, y, const1_rtx);
else
emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
emit_insn (gen_cmp_ltusi_insn (x, tmp));
emit_insn (gen_pic_load_addr (address, orig));
emit_insn (gen_addsi3 (address, address, pic_offset_table_rtx));
- pic_ref = gen_rtx (MEM, Pmode, address);
+ pic_ref = gen_rtx_MEM (Pmode, address);
RTX_UNCHANGING_P (pic_ref) = 1;
insn = emit_move_insn (reg, pic_ref);
#if 0
/* Put a REG_EQUAL note on this insn, so that it can be optimized
by loop. */
- REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig,
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
REG_NOTES (insn));
#endif
return reg;
abort ();
}
- return gen_rtx (PLUS, Pmode, base, offset);
+ return gen_rtx_PLUS (Pmode, base, offset);
}
return orig;
bytes_rtx = convert_to_mode (Pmode, bytes_rtx, 1);
#ifdef TARGET_MEM_FUNCTIONS
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0,
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0,
VOIDmode, 3, dest_reg, Pmode, src_reg, Pmode,
convert_to_mode (TYPE_MODE (sizetype), bytes_rtx,
TREE_UNSIGNED (sizetype)),
TYPE_MODE (sizetype));
#else
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0,
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0,
VOIDmode, 3, src_reg, Pmode, dest_reg, Pmode,
convert_to_mode (TYPE_MODE (integer_type_node), bytes_rtx,
TREE_UNSIGNED (integer_type_node)),
create_regs_rtx (void)
{
/* regs_inited = 1; */
- ix_reg = gen_rtx (REG, HImode, HARD_X_REGNUM);
- iy_reg = gen_rtx (REG, HImode, HARD_Y_REGNUM);
- d_reg = gen_rtx (REG, HImode, HARD_D_REGNUM);
- m68hc11_soft_tmp_reg = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
-
- stack_push_word = gen_rtx (MEM, HImode,
- gen_rtx (PRE_DEC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
- stack_pop_word = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+ ix_reg = gen_rtx_REG (HImode, HARD_X_REGNUM);
+ iy_reg = gen_rtx_REG (HImode, HARD_Y_REGNUM);
+ d_reg = gen_rtx_REG (HImode, HARD_D_REGNUM);
+ m68hc11_soft_tmp_reg = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
+
+ stack_push_word = gen_rtx_MEM (HImode,
+ gen_rtx_PRE_DEC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
+ stack_pop_word = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
}
offset = GEN_INT (vl);
if (!VALID_CONSTANT_OFFSET_P (offset, mode))
{
- emit_insn (gen_rtx (SET, VOIDmode, reg,
- gen_rtx (PLUS, HImode, reg, big_offset)));
+ emit_insn (gen_rtx_SET (VOIDmode, reg,
+ gen_rtx_PLUS (HImode, reg, big_offset)));
offset = const0_rtx;
}
else
{
- emit_insn (gen_rtx (SET, VOIDmode, reg,
- gen_rtx (PLUS, HImode, reg,
+ emit_insn (gen_rtx_SET (VOIDmode, reg,
+ gen_rtx_PLUS (HImode, reg,
GEN_INT (vh << 8))));
}
emit_move_insn (operands[0],
- gen_rtx (MEM, GET_MODE (operands[1]),
- gen_rtx (PLUS, Pmode, reg, offset)));
+ gen_rtx_MEM (GET_MODE (operands[1]),
+ gen_rtx_PLUS (Pmode, reg, offset)));
return 1;
}
}
if (mode != BLKmode)
{
if (GET_MODE_SIZE (mode) == 2 * HARD_REG_SIZE)
- return gen_rtx (REG, mode, HARD_X_REGNUM);
+ return gen_rtx_REG (mode, HARD_X_REGNUM);
if (GET_MODE_SIZE (mode) > HARD_REG_SIZE)
{
return NULL_RTX;
}
- return gen_rtx (REG, mode, HARD_D_REGNUM);
+ return gen_rtx_REG (mode, HARD_D_REGNUM);
}
return NULL_RTX;
}
{
emit_move_after_reload (stack_push_word, m68hc11_soft_tmp_reg, scratch);
emit_move_after_reload (stack_push_word,
- gen_rtx (REG, HImode, SOFT_Z_REGNUM), scratch);
+ gen_rtx_REG (HImode, SOFT_Z_REGNUM), scratch);
emit_move_after_reload (stack_push_word,
- gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM),
+ gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM),
scratch);
}
if (regs_ever_live[regno] && !call_used_regs[regno])
{
emit_move_after_reload (stack_push_word,
- gen_rtx (REG, HImode, regno), scratch);
+ gen_rtx_REG (HImode, regno), scratch);
}
}
}
{
if (regs_ever_live[regno] && !call_used_regs[regno])
{
- emit_move_after_reload (gen_rtx (REG, HImode, regno),
+ emit_move_after_reload (gen_rtx_REG (HImode, regno),
stack_pop_word, scratch);
}
}
/* For an interrupt handler, restore ZTMP, ZREG and XYREG. */
if (current_function_interrupt)
{
- emit_move_after_reload (gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM),
+ emit_move_after_reload (gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM),
stack_pop_word, scratch);
- emit_move_after_reload (gen_rtx (REG, HImode, SOFT_Z_REGNUM),
+ emit_move_after_reload (gen_rtx_REG (HImode, SOFT_Z_REGNUM),
stack_pop_word, scratch);
emit_move_after_reload (m68hc11_soft_tmp_reg, stack_pop_word, scratch);
}
emit_move_after_reload (scratch, stack_pointer_rtx, 0);
addr_reg = scratch;
}
- emit_move_after_reload (gen_rtx (MEM, HImode,
- gen_rtx (PLUS, HImode, addr_reg,
+ emit_move_after_reload (gen_rtx_MEM (HImode,
+ gen_rtx_PLUS (HImode, addr_reg,
GEN_INT (1))), d_reg, 0);
if (return_size > HARD_REG_SIZE)
- emit_move_after_reload (gen_rtx (MEM, HImode,
- gen_rtx (PLUS, HImode, addr_reg,
+ emit_move_after_reload (gen_rtx_MEM (HImode,
+ gen_rtx_PLUS (HImode, addr_reg,
GEN_INT (3))), ix_reg, 0);
}
correct order. */
if (GET_CODE (x) == MEM && m68hc11_auto_inc_p (XEXP (x, 0)))
{
- return gen_rtx (MEM, mode, XEXP (x, 0));
+ return gen_rtx_MEM (mode, XEXP (x, 0));
}
/* Note that a CONST_DOUBLE rtx could represent either an integer or a
}
if (mode == QImode && D_REG_P (x))
- return gen_rtx (REG, mode, HARD_B_REGNUM);
+ return gen_rtx_REG (mode, HARD_B_REGNUM);
/* gen_lowpart crashes when it is called with a SUBREG. */
if (GET_CODE (x) == SUBREG && SUBREG_BYTE (x) != 0)
correct order. */
if (GET_CODE (x) == MEM && m68hc11_auto_inc_p (XEXP (x, 0)))
{
- return gen_rtx (MEM, mode, XEXP (x, 0));
+ return gen_rtx_MEM (mode, XEXP (x, 0));
}
/* Note that a CONST_DOUBLE rtx could represent either an integer or a
}
}
if (mode == QImode && D_REG_P (x))
- return gen_rtx (REG, mode, HARD_A_REGNUM);
+ return gen_rtx_REG (mode, HARD_A_REGNUM);
/* There is no way in GCC to represent the upper part of a word register.
To obtain the 8-bit upper part of a soft register, we change the
/* Avoid the '*' for direct addressing mode when this
addressing mode is disabled. */
pos = TARGET_NO_DIRECT_MODE ? 1 : 0;
- return gen_rtx (MEM, QImode,
- gen_rtx (SYMBOL_REF, Pmode,
+ return gen_rtx_MEM (QImode,
+ gen_rtx_SYMBOL_REF (Pmode,
®_names[REGNO (x)][pos]));
}
/* gen_highpart crashes when it is called with a SUBREG. */
if (GET_CODE (x) == SUBREG)
{
- return gen_rtx (SUBREG, mode, XEXP (x, 0), XEXP (x, 1));
+ return gen_rtx_SUBREG (mode, XEXP (x, 0), XEXP (x, 1));
}
if (GET_CODE (x) == REG)
{
if (REGNO (x) < FIRST_PSEUDO_REGISTER)
- return gen_rtx (REG, mode, REGNO (x));
+ return gen_rtx_REG (mode, REGNO (x));
else
return gen_rtx_SUBREG (mode, x, 0);
}
rtx p;
if (D_REG_P (reg))
- x_reg = gen_rtx (REG, SImode, HARD_X_REGNUM);
+ x_reg = gen_rtx_REG (SImode, HARD_X_REGNUM);
else
x_reg = 0;
if (TARGET_M6812
&& IS_STACK_PUSH (to)
- && reg_mentioned_p (gen_rtx (REG, HImode, HARD_SP_REGNUM), from))
+ && reg_mentioned_p (gen_rtx_REG (HImode, HARD_SP_REGNUM), from))
{
if (mode == SImode)
{
if (!H_REG_P (operands[0]) && operands[3])
{
emit_move_insn (operands[3], operands[1]);
- emit_insn (gen_rtx (SET, mode,
+ emit_insn (gen_rtx_SET (mode,
operands[3],
gen_rtx (code, mode,
operands[3], operands[2])));
}
else
{
- insn = emit_insn (gen_rtx (SET, mode,
+ insn = emit_insn (gen_rtx_SET (mode,
operands[0],
gen_rtx (code, mode,
operands[0], operands[2])));
{
cc_status = cc_prev_status;
if (D_REG_P (cc_status.value1))
- cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
+ cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_X_REGNUM);
else
- cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
+ cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_D_REGNUM);
}
else
{
cc_status = cc_prev_status;
if (D_REG_P (cc_status.value1))
- cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
+ cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_Y_REGNUM);
else
- cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
+ cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_D_REGNUM);
}
else
if (info->regno >= 0)
{
reg = info->regno;
- info->replace_reg = gen_rtx (REG, HImode, reg);
+ info->replace_reg = gen_rtx_REG (HImode, reg);
}
else if (info->can_use_d)
{
if (Z_REG_P (dst) && (H_REG_P (src) && !SP_REG_P (src)))
{
- XEXP (body, 0) = gen_rtx (REG, GET_MODE (dst), SOFT_Z_REGNUM);
+ XEXP (body, 0) = gen_rtx_REG (GET_MODE (dst), SOFT_Z_REGNUM);
return;
}
else if (Z_REG_P (src)
&& ((H_REG_P (dst) && !SP_REG_P (src)) || dst == cc0_rtx))
{
- XEXP (body, 1) = gen_rtx (REG, GET_MODE (src), SOFT_Z_REGNUM);
+ XEXP (body, 1) = gen_rtx_REG (GET_MODE (src), SOFT_Z_REGNUM);
return;
}
else if (D_REG_P (dst)
&& m68hc11_arith_operator (src, GET_MODE (src))
&& D_REG_P (XEXP (src, 0)) && Z_REG_P (XEXP (src, 1)))
{
- XEXP (src, 1) = gen_rtx (REG, GET_MODE (src), SOFT_Z_REGNUM);
+ XEXP (src, 1) = gen_rtx_REG (GET_MODE (src), SOFT_Z_REGNUM);
return;
}
else if (Z_REG_P (dst) && GET_CODE (src) == CONST_INT
&& INTVAL (src) == 0)
{
- XEXP (body, 0) = gen_rtx (REG, GET_MODE (dst), SOFT_Z_REGNUM);
+ XEXP (body, 0) = gen_rtx_REG (GET_MODE (dst), SOFT_Z_REGNUM);
/* Force it to be re-recognized. */
INSN_CODE (insn) = -1;
return;
rtx dst;
if (info.must_push_reg && 0)
- dst = gen_rtx (MEM, HImode,
- gen_rtx (PRE_DEC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+ dst = gen_rtx_MEM (HImode,
+ gen_rtx_PRE_DEC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
- dst = gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM);
+ dst = gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM);
emit_insn_before (gen_movhi (dst,
- gen_rtx (REG, HImode, info.regno)), insn);
+ gen_rtx_REG (HImode, info.regno)), insn);
}
if (info.must_load_z && !info.must_push_reg)
{
- emit_insn_before (gen_movhi (gen_rtx (REG, HImode, info.regno),
- gen_rtx (REG, HImode, SOFT_Z_REGNUM)),
+ emit_insn_before (gen_movhi (gen_rtx_REG (HImode, info.regno),
+ gen_rtx_REG (HImode, SOFT_Z_REGNUM)),
insn);
}
if (reg_mentioned_p (z_reg, insn))
{
if (replace_reg_qi == NULL_RTX)
- replace_reg_qi = gen_rtx (REG, QImode, REGNO (replace_reg));
+ replace_reg_qi = gen_rtx_REG (QImode, REGNO (replace_reg));
validate_replace_rtx (z_reg_qi, replace_reg_qi, insn);
}
if (info.save_before_last)
save_pos_insn = PREV_INSN (save_pos_insn);
- emit_insn_before (gen_movhi (gen_rtx (REG, HImode, SOFT_Z_REGNUM),
- gen_rtx (REG, HImode, info.regno)),
+ emit_insn_before (gen_movhi (gen_rtx_REG (HImode, SOFT_Z_REGNUM),
+ gen_rtx_REG (HImode, info.regno)),
save_pos_insn);
}
rtx new_body, body;
body = PATTERN (info.last);
- new_body = gen_rtx (PARALLEL, VOIDmode,
+ new_body = gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (3, body,
- gen_rtx (USE, VOIDmode,
+ gen_rtx_USE (VOIDmode,
replace_reg),
- gen_rtx (USE, VOIDmode,
- gen_rtx (REG, HImode,
+ gen_rtx_USE (VOIDmode,
+ gen_rtx_REG (HImode,
SOFT_Z_REGNUM))));
PATTERN (info.last) = new_body;
rtx dst;
if (info.must_push_reg && 0)
- dst = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+ dst = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
- dst = gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM);
+ dst = gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM);
- emit_insn_before (gen_movhi (gen_rtx (REG, HImode, info.regno),
+ emit_insn_before (gen_movhi (gen_rtx_REG (HImode, info.regno),
dst), insn);
}
{
rtx insn;
- ix_reg = gen_rtx (REG, HImode, HARD_X_REGNUM);
- iy_reg = gen_rtx (REG, HImode, HARD_Y_REGNUM);
- z_reg = gen_rtx (REG, HImode, HARD_Z_REGNUM);
- z_reg_qi = gen_rtx (REG, QImode, HARD_Z_REGNUM);
+ ix_reg = gen_rtx_REG (HImode, HARD_X_REGNUM);
+ iy_reg = gen_rtx_REG (HImode, HARD_Y_REGNUM);
+ z_reg = gen_rtx_REG (HImode, HARD_Z_REGNUM);
+ z_reg_qi = gen_rtx_REG (QImode, HARD_Z_REGNUM);
/* Scan all insns to replace Z by X or Y preserving the old value
of X/Y and restoring it afterward. */
rtx insn, first;
z_replacement_completed = 0;
- z_reg = gen_rtx (REG, HImode, HARD_Z_REGNUM);
+ z_reg = gen_rtx_REG (HImode, HARD_Z_REGNUM);
first = get_insns ();
/* Some RTX are shared at this point. This breaks the Z register
The high part is passed in X and the low part in D.
For GCC, the register number must be HARD_X_REGNUM. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), \
+ gen_rtx_REG (TYPE_MODE (VALTYPE), \
((TYPE_MODE (VALTYPE) == BLKmode \
|| GET_MODE_SIZE (TYPE_MODE (VALTYPE)) <= 2) \
? HARD_D_REGNUM : HARD_X_REGNUM))
#define LIBCALL_VALUE(MODE) \
- gen_rtx (REG, MODE, \
+ gen_rtx_REG (MODE, \
(((MODE) == BLKmode || GET_MODE_SIZE (MODE) <= 2) \
? HARD_D_REGNUM : HARD_X_REGNUM))
(set (cc0) (reg:QI D_REGNUM))
(parallel [(set (reg:HI D_REGNUM) (match_dup 1))
(set (match_dup 1) (reg:HI D_REGNUM))])]
- "operands[1] = gen_rtx (REG, HImode, REGNO (operands[0]));")
+ "operands[1] = gen_rtx_REG (HImode, REGNO (operands[0]));")
(define_insn "tstqi_1"
[(set (cc0)
(set (match_dup 1) (match_dup 2))
(set (cc0) (match_dup 0))
(set (match_dup 1) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
- "operands[2] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
+ "operands[2] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
;;--------------------------------------------------------------------
[(set (match_dup 2) (match_dup 1))
(set (cc0)
(compare (match_dup 0) (match_dup 2)))]
- "operands[2] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);")
+ "operands[2] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);")
(define_expand "cmphi"
[(set (cc0)
(set (match_dup 2) (match_dup 3))
(set (cc0) (compare (match_dup 0) (match_dup 1)))
(set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
- "operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
+ "operands[3] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
;;
;; 8-bit comparison with address register.
(compare (reg:QI D_REGNUM) (match_dup 1)))
(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
(set (match_dup 3) (reg:HI D_REGNUM))])]
- "operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));")
+ "operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));")
(define_split
[(set (cc0)
[(set (match_dup 3) (match_dup 4))
(set (cc0)
(compare (match_dup 0) (match_dup 2)))]
- "operands[2] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
- operands[3] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
- operands[4] = gen_rtx (REG, HImode, REGNO (operands[1]));")
+ "operands[2] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
+ operands[3] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
+ operands[4] = gen_rtx_REG (HImode, REGNO (operands[1]));")
(define_expand "cmpqi"
[(set (cc0)
"z_replacement_completed == 2"
[(set (match_dup 3) (match_dup 2))
(set (cc0) (and:QI (match_dup 0) (match_dup 4)))]
- "operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));
- operands[3] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
- operands[4] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);")
+ "operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));
+ operands[3] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
+ operands[4] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);")
(define_insn "bitcmpqi_z_used"
[(set (cc0)
(set (match_dup 2) (match_dup 3))
(set (cc0) (and:QI (match_dup 0) (match_dup 1)))
(set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
- "operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
+ "operands[3] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
(define_insn "bitcmphi"
[(set (cc0)
(set (match_dup 2) (match_dup 3))
(set (cc0) (compare (match_dup 0) (match_dup 1)))
(set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
- "operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
+ "operands[3] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
;;--------------------------------------------------------------------
;;- Move strict_low_part
{
rtx insn;
- insn = emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1]));
+ insn = emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC,
stack_pointer_rtx,
REG_NOTES (insn));
(set (reg:QI D_REGNUM) (match_dup 1))
(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
(set (match_dup 2) (reg:HI D_REGNUM))])]
- "operands[2] = gen_rtx (REG, HImode, REGNO (operands[0]));")
+ "operands[2] = gen_rtx_REG (HImode, REGNO (operands[0]));")
;;
;; 8-bit operations on address registers.
(set (match_dup 0) (reg:QI D_REGNUM))
(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
(set (match_dup 2) (reg:HI D_REGNUM))])]
- "operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));")
+ "operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));")
(define_insn "*movqi2_push"
[(set (match_operand:QI 0 "push_operand" "=<,<")
{
rtx insn;
- insn = emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1]));
+ insn = emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC,
stack_pointer_rtx,
REG_NOTES (insn));
/* Source operand must be in a hard register. */
if (!H_REG_P (src))
{
- src = gen_rtx (REG, QImode, REGNO (operands[2]));
+ src = gen_rtx_REG (QImode, REGNO (operands[2]));
emit_move_insn (src, operands[1]);
}
else
{
emit_move_insn (push, operands[2]);
- emit_insn (gen_addhi3 (gen_rtx (REG, HImode, HARD_SP_REGNUM),
- gen_rtx (REG, HImode, HARD_SP_REGNUM),
+ emit_insn (gen_addhi3 (gen_rtx_REG (HImode, HARD_SP_REGNUM),
+ gen_rtx_REG (HImode, HARD_SP_REGNUM),
const1_rtx));
}
}
{
/* Source is in X or Y. It's better to push the 16-bit register
and then to some stack adjustment. */
- src = gen_rtx (REG, HImode, REGNO (src));
+ src = gen_rtx_REG (HImode, REGNO (src));
emit_move_insn (push, src);
emit_move_insn (operands[2], const0_rtx);
- emit_insn (gen_addhi3 (gen_rtx (REG, HImode, HARD_SP_REGNUM),
- gen_rtx (REG, HImode, HARD_SP_REGNUM),
+ emit_insn (gen_addhi3 (gen_rtx_REG (HImode, HARD_SP_REGNUM),
+ gen_rtx_REG (HImode, HARD_SP_REGNUM),
const1_rtx));
emit_move_insn (push, operands[2]);
- emit_insn (gen_addhi3 (gen_rtx (REG, HImode, HARD_SP_REGNUM),
- gen_rtx (REG, HImode, HARD_SP_REGNUM),
+ emit_insn (gen_addhi3 (gen_rtx_REG (HImode, HARD_SP_REGNUM),
+ gen_rtx_REG (HImode, HARD_SP_REGNUM),
const1_rtx));
}
emit_move_insn (push, operands[2]);
/* Source operand must be in a hard register. */
if (!H_REG_P (src))
{
- src = gen_rtx (REG, QImode, REGNO (operands[2]));
+ src = gen_rtx_REG (QImode, REGNO (operands[2]));
emit_move_insn (src, operands[1]);
}
emit_move_insn (m68hc11_gen_lowpart (QImode, low2), src);
emit_move_insn (operands[2], const0_rtx);
- src = gen_rtx (REG, QImode, REGNO (operands[2]));
+ src = gen_rtx_REG (QImode, REGNO (operands[2]));
emit_move_insn (m68hc11_gen_highpart (QImode, low2), src);
emit_move_insn (m68hc11_gen_highpart (HImode, low), operands[2]);
"
if (X_REG_P (operands[1]))
{
- emit_insn (gen_swap_areg (gen_rtx (REG, HImode, HARD_D_REGNUM),
- gen_rtx (REG, HImode, HARD_X_REGNUM)));
- emit_insn (gen_zero_extendqihi2 (gen_rtx (REG, HImode, HARD_D_REGNUM),
- gen_rtx (REG, QImode, HARD_D_REGNUM)));
- emit_move_insn (gen_rtx (REG, HImode, HARD_X_REGNUM),
+ emit_insn (gen_swap_areg (gen_rtx_REG (HImode, HARD_D_REGNUM),
+ gen_rtx_REG (HImode, HARD_X_REGNUM)));
+ emit_insn (gen_zero_extendqihi2 (gen_rtx_REG (HImode, HARD_D_REGNUM),
+ gen_rtx_REG (QImode, HARD_D_REGNUM)));
+ emit_move_insn (gen_rtx_REG (HImode, HARD_X_REGNUM),
const0_rtx);
DONE;
}
- if (reg_mentioned_p (gen_rtx (REG, HImode, HARD_X_REGNUM), operands[1]))
+ if (reg_mentioned_p (gen_rtx_REG (HImode, HARD_X_REGNUM), operands[1]))
{
emit_insn (gen_zero_extendqihi2 (m68hc11_gen_lowpart (HImode,
operands[0]),
operands[1]));
- emit_move_insn (gen_rtx (REG, HImode, HARD_X_REGNUM), const0_rtx);
+ emit_move_insn (gen_rtx_REG (HImode, HARD_X_REGNUM), const0_rtx);
DONE;
}
operands[4] = m68hc11_gen_highpart (HImode, operands[0]);
operands[5] = m68hc11_gen_lowpart (HImode, operands[0]);
if (A_REG_P (operands[1]))
{
- operands[2] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
- operands[3] = gen_rtx (REG, HImode, REGNO (operands[1]));
- operands[6] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
+ operands[2] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
+ operands[3] = gen_rtx_REG (HImode, REGNO (operands[1]));
+ operands[6] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
}
else
{
operands[5] = operands[2] =
- operands[3] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ operands[3] = gen_rtx_REG (HImode, HARD_D_REGNUM);
operands[6] = operands[1];
}
")
{
if (!D_REG_P (operands[1]))
{
- ops[0] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movqi (insn, ops);
}
{
if (!D_REG_P (operands[1]))
{
- ops[0] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movqi (insn, ops);
}
x_reg_used = reg_mentioned_p (ix_reg, operands[1]);
if (x_reg_used)
{
- ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
Don't use it; keep it for documentation. */
if (!D_REG_P (operands[1]) && !x_reg_used)
{
- ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
}
else
{
- ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
}
else if (!D_REG_P (operands[1]))
{
- ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
{
if (H_REG_P (operands[1]))
{
- ops[0] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
- ops[1] = gen_rtx (REG, HImode, REGNO (operands[1]));
+ ops[0] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
+ ops[1] = gen_rtx_REG (HImode, REGNO (operands[1]));
m68hc11_gen_movhi (insn, ops);
}
else
}
else if (!D_REG_P (operands[1]))
{
- ops[0] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movqi (insn, ops);
}
"operands[4] = m68hc11_gen_highpart (HImode, operands[2]);
if (X_REG_P (operands[0]))
{
- operands[5] = operands[6] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ operands[5] = operands[6] = gen_rtx_REG (HImode, HARD_D_REGNUM);
}
else
{
{
if (TARGET_M6811 && SP_REG_P (operands[0]))
{
- emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
- gen_rtx (SET, VOIDmode,
+ emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
+ gen_rtx_SET (VOIDmode,
operand0,
- gen_rtx (PLUS, HImode,
+ gen_rtx_PLUS (HImode,
operand1, operand2)),
- gen_rtx (CLOBBER, VOIDmode,
- gen_rtx (SCRATCH, HImode)))));
+ gen_rtx_CLOBBER (VOIDmode,
+ gen_rtx_SCRATCH (HImode)))));
DONE;
}
}")
HOST_WIDE_INT val;
if (optimize && Y_REG_P (operands[3])
- && dead_register_here (insn, gen_rtx (REG, HImode, HARD_X_REGNUM)))
- operands[3] = gen_rtx (REG, HImode, HARD_X_REGNUM);
+ && dead_register_here (insn, gen_rtx_REG (HImode, HARD_X_REGNUM)))
+ operands[3] = gen_rtx_REG (HImode, HARD_X_REGNUM);
if (GET_CODE (operands[2]) == CONST_INT
&& (val = INTVAL (operands[2])) != 0
output_asm_insn (\"ts%3\", operands);
if (GET_CODE (operands[2]) == CONST_INT
&& ((val = INTVAL (operands[2])) >= 0 && val < 0x100)
- && dead_register_here (insn, gen_rtx (REG, HImode, HARD_D_REGNUM)))
+ && dead_register_here (insn, gen_rtx_REG (HImode, HARD_D_REGNUM)))
{
output_asm_insn (\"ldab\\t%2\", operands);
output_asm_insn (\"ab%3\", operands);
if (A_REG_P (operands[2]))
{
if (TARGET_M6812)
- ops[0] = gen_rtx (MEM, HImode,
- gen_rtx (PRE_DEC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+ ops[0] = gen_rtx_MEM (HImode,
+ gen_rtx_PRE_DEC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
- ops[0] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movhi (insn, ops);
if (TARGET_M6812)
- operands[2] = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+ operands[2] = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
- operands[2] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
+ operands[2] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
}
ops[0] = gen_label_rtx ();
output_asm_insn (\"subd\\t%2\", operands);
if (A_REG_P (operands[2]))
{
- ops[0] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movhi (insn, ops);
- operands[2] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
+ operands[2] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
}
ops[0] = gen_label_rtx ();
output_asm_insn (\"subb\\t%b2\", operands);
{
rtx ops[2];
- ops[0] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
return \"subb\\t%T0\\n\\tsbca\\t#0\";
operands[1] = temp;
}
- ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
(set (match_dup 3) (reg:HI D_REGNUM))])]
"
- operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));
+ operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));
if (A_REG_P (operands[1]))
- operands[5] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+ operands[5] = gen_rtx_REG (QImode, HARD_D_REGNUM);
else
operands[5] = operands[1];
if (A_REG_P (operands[2]))
- operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+ operands[6] = gen_rtx_REG (QImode, HARD_D_REGNUM);
else
operands[6] = operands[2];
")
{
rtx ops[2];
- ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
}
{
operands[5] = operands[1];
/* Make all the (set (REG:x) (REG:y)) a nop set. */
- operands[4] = gen_rtx (REG, QImode, HARD_A_REGNUM);
- operands[7] = gen_rtx (REG, QImode, HARD_D_REGNUM);
- operands[6] = gen_rtx (REG, HImode, HARD_X_REGNUM);
+ operands[4] = gen_rtx_REG (QImode, HARD_A_REGNUM);
+ operands[7] = gen_rtx_REG (QImode, HARD_D_REGNUM);
+ operands[6] = gen_rtx_REG (HImode, HARD_X_REGNUM);
}
else
{
{
operands[5] = operands[1];
/* Make all the (set (REG:x) (REG:y)) a nop set. */
- operands[4] = gen_rtx (REG, HImode, HARD_D_REGNUM);
- operands[6] = gen_rtx (REG, HImode, HARD_X_REGNUM);
+ operands[4] = gen_rtx_REG (HImode, HARD_D_REGNUM);
+ operands[6] = gen_rtx_REG (HImode, HARD_X_REGNUM);
}
else
{
PUT_MODE (operands[3], QImode);
if (D_REG_P (operands[2]))
{
- operands[4] = gen_rtx (REG, QImode, HARD_A_REGNUM);
+ operands[4] = gen_rtx_REG (QImode, HARD_A_REGNUM);
operands[5] = operands[1];
- operands[6] = gen_rtx (REG, QImode, HARD_B_REGNUM);
+ operands[6] = gen_rtx_REG (QImode, HARD_B_REGNUM);
}
else
{
operands[4] = m68hc11_gen_highpart (QImode, operands[2]);
operands[5] = m68hc11_gen_lowpart (QImode, operands[2]);
if (D_REG_P (operands[1]))
- operands[6] = gen_rtx (REG, QImode, HARD_B_REGNUM);
+ operands[6] = gen_rtx_REG (QImode, HARD_B_REGNUM);
else
operands[6] = operands[1];
}
operands[5] = operands[1];
if (D_REG_P (operands[2]))
{
- operands[4] = gen_rtx (REG, QImode, HARD_B_REGNUM);
+ operands[4] = gen_rtx_REG (QImode, HARD_B_REGNUM);
}
else
{
"operands[5] = m68hc11_gen_highpart (HImode, operands[1]);
if (X_REG_P (operands[2]))
{
- operands[4] = gen_rtx (REG, HImode, HARD_D_REGNUM);
- operands[6] = gen_rtx (REG, HImode, HARD_X_REGNUM);
+ operands[4] = gen_rtx_REG (HImode, HARD_D_REGNUM);
+ operands[6] = gen_rtx_REG (HImode, HARD_X_REGNUM);
}
else
{
if (GET_CODE (operands[3]) == AND)
operands[5] = const0_rtx;
else
- operands[5] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ operands[5] = gen_rtx_REG (HImode, HARD_D_REGNUM);
")
|| (m68hc11_small_indexed_indirect_p (operands[2], HImode)
&& reg_mentioned_p (operands[0], operands[2]))))
{
- operands[4] = gen_rtx (MEM, HImode,
- gen_rtx (PRE_DEC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
- operands[6] = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+ operands[4] = gen_rtx_MEM (HImode,
+ gen_rtx_PRE_DEC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
+ operands[6] = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
operands[5] = operands[2];
operands[8] = operands[7] = operands[0];
}
if (GET_CODE (operands[3]) == MINUS
&& reg_mentioned_p (operands[0], operands[2]))
{
- operands[9] = gen_rtx (MEM, HImode,
- gen_rtx (PRE_DEC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
- operands[1] = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
- operands[8] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
+ operands[9] = gen_rtx_MEM (HImode,
+ gen_rtx_PRE_DEC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
+ operands[1] = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
+ operands[8] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[4] = operands[7] = operands[0];
operands[6] = operands[8];
operands[5] = operands[2];
}
else
{
- operands[4] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
+ operands[4] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[6] = operands[4];
if (!H_REG_P (operands[2]))
{
&& z_replacement_completed == 2 && !SP_REG_P (operands[2])"
[(set (match_dup 4) (match_dup 2))
(set (match_dup 0) (match_op_dup 3 [(match_dup 0) (match_dup 4)]))]
- "operands[4] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);")
+ "operands[4] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);")
;;
;; For 68HC12, push the operand[2] value on the stack and do the
&& z_replacement_completed == 2 && !SP_REG_P (operands[2])"
[(set (match_dup 4) (match_dup 2))
(set (match_dup 0) (match_op_dup 3 [(match_dup 0) (match_dup 5)]))]
- "operands[4] = gen_rtx (MEM, HImode,
- gen_rtx (PRE_DEC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
- operands[5] = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode,
- gen_rtx (REG, HImode, HARD_SP_REGNUM)));
+ "operands[4] = gen_rtx_MEM (HImode,
+ gen_rtx_PRE_DEC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
+ operands[5] = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode,
+ gen_rtx_REG (HImode, HARD_SP_REGNUM)));
")
;;--------------------------------------------------------------------
|| reg_mentioned_p (operands[0], operands[1]))
{
/* Move to the destination register, before the xgdx. */
- operands[4] = gen_rtx (REG, GET_MODE (operands[1]),
+ operands[4] = gen_rtx_REG (GET_MODE (operands[1]),
REGNO (operands[0]));
operands[5] = operands[1];
/* Apply the operation on D. */
- operands[3] = gen_rtx (REG, GET_MODE (operands[1]), HARD_D_REGNUM);
+ operands[3] = gen_rtx_REG (GET_MODE (operands[1]), HARD_D_REGNUM);
}
else
{
(set (reg:QI D_REGNUM) (match_op_dup 3 [(reg:QI D_REGNUM) (match_dup 7)]))
(parallel [(set (reg:HI D_REGNUM) (match_dup 4))
(set (match_dup 4) (reg:HI D_REGNUM))])]
- "operands[4] = gen_rtx (REG, HImode, REGNO (operands[0]));
+ "operands[4] = gen_rtx_REG (HImode, REGNO (operands[0]));
/* For the second operand is a hard register or if the address
register appears in the source, we have to save the operand[2]
will result in a nop. */
if (H_REG_P (operands[2]))
{
- operands[5] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
- operands[6] = gen_rtx (REG, HImode, REGNO (operands[2]));
- operands[7] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
+ operands[5] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
+ operands[6] = gen_rtx_REG (HImode, REGNO (operands[2]));
+ operands[7] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
}
else if (reg_mentioned_p (operands[0], operands[2]))
{
- operands[5] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
+ operands[5] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
operands[6] = operands[2];
operands[7] = operands[5];
}
else
{
- operands[5] = operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+ operands[5] = operands[6] = gen_rtx_REG (QImode, HARD_D_REGNUM);
operands[7] = operands[2];
}
")
"reload_completed"
[(set (match_dup 5) (match_dup 6))
(set (match_dup 0) (match_op_dup 3 [(match_dup 0) (match_dup 4)]))]
- "operands[4] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
- operands[5] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
- operands[6] = gen_rtx (REG, HImode, REGNO (operands[2]));")
+ "operands[4] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
+ operands[5] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
+ operands[6] = gen_rtx_REG (HImode, REGNO (operands[2]));")
;;--------------------------------------------------------------------
;; 8-bit Unary operations on X and Y:
(set (match_dup 3) (reg:HI D_REGNUM))])]
"
{
- operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));
+ operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));
if ((H_REG_P (operands[1])
&& !rtx_equal_p (operands[0], operands[1]))
|| reg_mentioned_p (operands[0], operands[1]))
operands[5] = operands[1];
/* Apply the operation on D. */
- operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
+ operands[6] = gen_rtx_REG (QImode, HARD_D_REGNUM);
}
else
{
rtx ops[2];
ops[1] = m68hc11_gen_lowpart (HImode, operands[1]);
- ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"lsld\", ops);
if (!X_REG_P (operands[0]))
{
/* Load the high part in X in case the source operand
uses X as a memory pointer. */
- ops[0] = gen_rtx (REG, HImode, HARD_X_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_X_REGNUM);
ops[1] = m68hc11_gen_highpart (HImode, operands[1]);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"xgdx\", ops);
{
rtx scratch = gen_reg_rtx (HImode);
emit_move_insn (scratch, operands[2]);
- emit_insn (gen_rtx (PARALLEL, VOIDmode,
- gen_rtvec (2, gen_rtx (SET, VOIDmode,
+ emit_insn (gen_rtx_PARALLEL (VOIDmode,
+ gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ASHIFT (HImode,
operand1, scratch)),
- gen_rtx (CLOBBER, VOIDmode, scratch))));
+ gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
if (!D_REG_P (operands[0]) && !Q_REG_P (operands[0]))
return \"#\";
- ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
rtx scratch = gen_reg_rtx (HImode);
emit_move_insn (scratch, operands[2]);
- emit_insn (gen_rtx (PARALLEL, VOIDmode,
- gen_rtvec (2, gen_rtx (SET, VOIDmode,
+ emit_insn (gen_rtx_PARALLEL (VOIDmode,
+ gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ASHIFTRT (HImode,
operand1, scratch)),
- gen_rtx (CLOBBER, VOIDmode, scratch))));
+ gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
if (!D_REG_P (operands[0]) && !Q_REG_P (operands[0]))
return \"#\";
- ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
rtx ops[2];
ops[1] = m68hc11_gen_highpart (HImode, operands[1]);
- ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"lsrd\", ops);
if (!X_REG_P (operands[0]))
else
{
/* Load the lowpart in X in case the operands is some N,x. */
- ops[0] = gen_rtx (REG, HImode, HARD_X_REGNUM);
+ ops[0] = gen_rtx_REG (HImode, HARD_X_REGNUM);
ops[1] = m68hc11_gen_lowpart (HImode, operands[1]);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"xgdx\", ops);
operand1 = force_reg (HImode, operand1);
emit_move_insn (scratch, operands[2]);
- emit_insn (gen_rtx (PARALLEL, VOIDmode,
- gen_rtvec (2, gen_rtx (SET, VOIDmode,
+ emit_insn (gen_rtx_PARALLEL (VOIDmode,
+ gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_LSHIFTRT (HImode,
operand1, scratch)),
- gen_rtx (CLOBBER, VOIDmode, scratch))));
+ gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
return \"#\";
CC_STATUS_INIT;
- ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
+ ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
operand1 = force_reg (HImode, operand1);
emit_move_insn (scratch, operands[2]);
- emit_insn (gen_rtx (PARALLEL, VOIDmode,
- gen_rtvec (2, gen_rtx (SET, VOIDmode,
+ emit_insn (gen_rtx_PARALLEL (VOIDmode,
+ gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ROTATE (HImode,
operand1, scratch)),
- gen_rtx (CLOBBER, VOIDmode, scratch))));
+ gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
operand1 = force_reg (HImode, operand1);
emit_move_insn (scratch, operands[2]);
- emit_insn (gen_rtx (PARALLEL, VOIDmode,
- gen_rtvec (2, gen_rtx (SET, VOIDmode,
+ emit_insn (gen_rtx_PARALLEL (VOIDmode,
+ gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ROTATERT (HImode,
operand1, scratch)),
- gen_rtx (CLOBBER, VOIDmode, scratch))));
+ gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
if (GET_MODE (operands[0]) == HImode)
{
emit_jump_insn (gen_m68hc12_dbcc_dec_hi (operands[0],
- gen_rtx (NE, HImode),
+ gen_rtx_NE (HImode),
operands[4]));
DONE;
}
if (GET_MODE (operands[0]) == QImode)
{
emit_jump_insn (gen_m68hc12_dbcc_dec_qi (operands[0],
- gen_rtx (NE, QImode),
+ gen_rtx_NE (QImode),
operands[4]));
DONE;
}
if (ret_size && ret_size <= 2)
{
- emit_jump_insn (gen_rtx (PARALLEL, VOIDmode,
+ emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_RETURN (VOIDmode),
gen_rtx_USE (VOIDmode,
gen_rtx_REG (HImode, 1)))));
}
if (ret_size)
{
- emit_jump_insn (gen_rtx (PARALLEL, VOIDmode,
+ emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_RETURN (VOIDmode),
gen_rtx_USE (VOIDmode,
gen_rtx_REG (SImode, 0)))));
(match_scratch:HI 0 "xy")]
"0 && TARGET_M6812 && optimize_size"
[(set (match_dup 0) (match_dup 1))]
- "operands[1] = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode,
+ "operands[1] = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));")
;;
&& reg_mentioned_p (operands[0], operands[2])"
[(set (cc0) (match_dup 3))]
"if (INTVAL (operands[1]) == 1)
- operands[3] = gen_rtx (MEM, QImode,
- gen_rtx (PRE_INC, HImode, operands[0]));
+ operands[3] = gen_rtx_MEM (QImode,
+ gen_rtx_PRE_INC (HImode, operands[0]));
else
- operands[3] = gen_rtx (MEM, QImode,
- gen_rtx (PRE_DEC, HImode, operands[0]));
+ operands[3] = gen_rtx_MEM (QImode,
+ gen_rtx_PRE_DEC (HImode, operands[0]));
")
;;
&& reg_mentioned_p (operands[0], operands[3])"
[(set (cc0) (compare (match_dup 2) (match_dup 4)))]
"if (INTVAL (operands[1]) == 1)
- operands[4] = gen_rtx (MEM, QImode,
- gen_rtx (PRE_INC, HImode, operands[0]));
+ operands[4] = gen_rtx_MEM (QImode,
+ gen_rtx_PRE_INC (HImode, operands[0]));
else
- operands[4] = gen_rtx (MEM, QImode,
- gen_rtx (PRE_DEC, HImode, operands[0]));
+ operands[4] = gen_rtx_MEM (QImode,
+ gen_rtx_PRE_DEC (HImode, operands[0]));
")
(define_peephole2
&& reg_mentioned_p (operands[0], operands[2])"
[(set (cc0) (compare (match_dup 4) (match_dup 3)))]
"if (INTVAL (operands[1]) == 1)
- operands[4] = gen_rtx (MEM, QImode,
- gen_rtx (PRE_INC, HImode, operands[0]));
+ operands[4] = gen_rtx_MEM (QImode,
+ gen_rtx_PRE_INC (HImode, operands[0]));
else
- operands[4] = gen_rtx (MEM, QImode,
- gen_rtx (PRE_DEC, HImode, operands[0]));
+ operands[4] = gen_rtx_MEM (QImode,
+ gen_rtx_PRE_DEC (HImode, operands[0]));
")
;;
rtx ops[2];
ops[0] = operands[0];
- ops[1] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[1] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
return \"\";
}
rtx ops[2];
ops[0] = operands[0];
- ops[1] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[1] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
return \"\";
}
rtx ops[2];
ops[0] = operands[0];
- ops[1] = gen_rtx (REG, HImode, HARD_D_REGNUM);
+ ops[1] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
return \"\";
}
rtx ops[2];
ops[0] = operands[2];
- ops[1] = gen_rtx (MEM, HImode,
- gen_rtx (POST_INC, HImode, stack_pointer_rtx));
+ ops[1] = gen_rtx_MEM (HImode,
+ gen_rtx_POST_INC (HImode, stack_pointer_rtx));
m68hc11_gen_movhi (insn, ops);
return \"\";
}
operands[0] = force_reg (SImode, XEXP (operands[0], 0));
else if (GET_CODE (operands[0]) == MEM
&& symbolic_operand (XEXP (operands[0], 0), SImode))
- operands[0] = gen_rtx (MEM, SImode,
+ operands[0] = gen_rtx_MEM (SImode,
force_reg (SImode, XEXP (operands[0], 0)));
}
}")
m68k doesn't consider PC-relative addresses to be writable. */
if (GET_CODE (operands[0]) == MEM
&& symbolic_operand (XEXP (operands[0], 0), SImode))
- operands[0] = gen_rtx (MEM, XFmode,
+ operands[0] = gen_rtx_MEM (XFmode,
force_reg (SImode, XEXP (operands[0], 0)));
}
}
/* If extending stack a lot, we do it incrementally. */
if (direction < 0 && size > mcore_stack_increment && mcore_stack_increment > 0)
{
- rtx tmp = gen_rtx (REG, SImode, 1);
+ rtx tmp = gen_rtx_REG (SImode, 1);
rtx memref;
emit_insn (gen_movsi (tmp, GEN_INT (mcore_stack_increment)));
do
{
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
- memref = gen_rtx (MEM, SImode, stack_pointer_rtx);
+ memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
MEM_VOLATILE_P (memref) = 1;
emit_insn (gen_movsi (memref, stack_pointer_rtx));
size -= mcore_stack_increment;
if (size > 32)
{
- rtx nval = gen_rtx (REG, SImode, 1);
+ rtx nval = gen_rtx_REG (SImode, 1);
emit_insn (gen_movsi (nval, val));
val = nval;
}
{
rtx op0 = arch_compare_op0;
rtx op1 = arch_compare_op1;
- rtx cc_reg = gen_rtx (REG, CCmode, CC_REG);
+ rtx cc_reg = gen_rtx_REG (CCmode, CC_REG);
if (CONSTANT_P (op1) && GET_CODE (op1) != CONST_INT)
op1 = force_reg (SImode, op1);
break;
}
- emit_insn (gen_rtx (SET, VOIDmode, cc_reg, gen_rtx (code, CCmode, op0, op1)));
+ emit_insn (gen_rtx_SET (VOIDmode, cc_reg, gen_rtx (code, CCmode, op0, op1)));
return cc_reg;
}
if ((INTVAL(operands[3])&1) == 0)
{
mask = ~(1 << posn);
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (AND, SImode, operands[0], GEN_INT (mask))));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_AND (SImode, operands[0], GEN_INT (mask))));
}
else
{
mask = 1 << posn;
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (IOR, SImode, operands[0], GEN_INT (mask))));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_IOR (SImode, operands[0], GEN_INT (mask))));
}
return 1;
INTVAL (operands[3]) == ((1 << width) - 1))
{
mreg = force_reg (SImode, GEN_INT (INTVAL (operands[3]) << posn));
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (IOR, SImode, operands[0], mreg)));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_IOR (SImode, operands[0], mreg)));
return 1;
}
mreg = force_reg (SImode, GEN_INT (~(((1 << width) - 1) << posn)));
/* Clear the field, to overlay it later with the source. */
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (AND, SImode, operands[0], mreg)));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_AND (SImode, operands[0], mreg)));
/* If the source is constant 0, we've nothing to add back. */
if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) == 0)
if (width + posn != (int) GET_MODE_SIZE (SImode))
{
ereg = force_reg (SImode, GEN_INT ((1 << width) - 1));
- emit_insn (gen_rtx (SET, SImode, sreg,
- gen_rtx (AND, SImode, sreg, ereg)));
+ emit_insn (gen_rtx_SET (SImode, sreg,
+ gen_rtx_AND (SImode, sreg, ereg)));
}
/* Insert source value in dest. */
if (posn != 0)
- emit_insn (gen_rtx (SET, SImode, sreg,
- gen_rtx (ASHIFT, SImode, sreg, GEN_INT (posn))));
+ emit_insn (gen_rtx_SET (SImode, sreg,
+ gen_rtx_ASHIFT (SImode, sreg, GEN_INT (posn))));
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (IOR, SImode, operands[0], sreg)));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_IOR (SImode, operands[0], sreg)));
return 1;
}
}
size -= amount[next];
- srcp = gen_rtx (MEM,
+ srcp = gen_rtx_MEM (
#if 0
MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode,
#else
mode[next],
#endif
- gen_rtx (PLUS, Pmode, src,
- gen_rtx (CONST_INT, SImode, offset_ld)));
+ gen_rtx_PLUS (Pmode, src,
+ gen_rtx_CONST_INT (SImode, offset_ld)));
RTX_UNCHANGING_P (srcp) = RTX_UNCHANGING_P (src_mem);
MEM_VOLATILE_P (srcp) = MEM_VOLATILE_P (src_mem);
MEM_IN_STRUCT_P (srcp) = 1;
- emit_insn (gen_rtx (SET, VOIDmode, temp[next], srcp));
+ emit_insn (gen_rtx_SET (VOIDmode, temp[next], srcp));
offset_ld += amount[next];
active[next] = TRUE;
}
{
active[phase] = FALSE;
- dstp = gen_rtx (MEM,
+ dstp = gen_rtx_MEM (
#if 0
MEM_IN_STRUCT_P (dst_mem) ? mode[phase] : BLKmode,
#else
mode[phase],
#endif
- gen_rtx (PLUS, Pmode, dest,
- gen_rtx (CONST_INT, SImode, offset_st)));
+ gen_rtx_PLUS (Pmode, dest,
+ gen_rtx_CONST_INT (SImode, offset_st)));
RTX_UNCHANGING_P (dstp) = RTX_UNCHANGING_P (dst_mem);
MEM_VOLATILE_P (dstp) = MEM_VOLATILE_P (dst_mem);
MEM_IN_STRUCT_P (dstp) = 1;
- emit_insn (gen_rtx (SET, VOIDmode, dstp, temp[phase]));
+ emit_insn (gen_rtx_SET (VOIDmode, dstp, temp[phase]));
offset_st += amount[phase];
}
}
}
/* If we get here, just use the library routine. */
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, VOIDmode, 3,
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3,
operands[0], Pmode, operands[1], Pmode, operands[2],
SImode);
}
for (offset = fi.arg_offset; remaining >= 4; offset -= 4, rn--, remaining -= 4)
{
emit_insn (gen_movsi
- (gen_rtx (MEM, SImode,
+ (gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, offset)),
- gen_rtx (REG, SImode, rn)));
+ gen_rtx_REG (SImode, rn)));
}
}
first_reg--;
first_reg++;
- emit_insn (gen_store_multiple (gen_rtx (MEM, SImode, stack_pointer_rtx),
- gen_rtx (REG, SImode, first_reg),
+ emit_insn (gen_store_multiple (gen_rtx_MEM (SImode, stack_pointer_rtx),
+ gen_rtx_REG (SImode, first_reg),
GEN_INT (16 - first_reg)));
i -= (15 - first_reg);
else if (fi.reg_mask & (1 << i))
{
emit_insn (gen_movsi
- (gen_rtx (MEM, SImode,
+ (gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, offs)),
- gen_rtx (REG, SImode, i)));
+ gen_rtx_REG (SImode, i)));
offs += 4;
}
}
first_reg++;
- emit_insn (gen_load_multiple (gen_rtx (REG, SImode, first_reg),
- gen_rtx (MEM, SImode, stack_pointer_rtx),
+ emit_insn (gen_load_multiple (gen_rtx_REG (SImode, first_reg),
+ gen_rtx_MEM (SImode, stack_pointer_rtx),
GEN_INT (16 - first_reg)));
i -= (15 - first_reg);
else if (fi.reg_mask & (1 << i))
{
emit_insn (gen_movsi
- (gen_rtx (REG, SImode, i),
- gen_rtx (MEM, SImode,
+ (gen_rtx_REG (SImode, i),
+ gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, offs))));
offs += 4;
}
idp = get_identifier (newname);
XEXP (DECL_RTL (decl), 0) =
- gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
+ gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
}
/* Mark a DECL as being dllimport'd. */
/* ??? At least I think that's why we do this. */
idp = get_identifier (newname);
- newrtl = gen_rtx (MEM, Pmode,
- gen_rtx (SYMBOL_REF, Pmode,
+ newrtl = gen_rtx_MEM (Pmode,
+ gen_rtx_SYMBOL_REF (Pmode,
IDENTIFIER_POINTER (idp)));
XEXP (DECL_RTL (decl), 0) = newrtl;
}
{
const char * oldname = XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0);
tree idp = get_identifier (oldname + 9);
- rtx newrtl = gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
+ rtx newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
XEXP (DECL_RTL (decl), 0) = newrtl;
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
-#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, FIRST_RET_REG)
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RET_REG)
/* 1 if N is a possible register number for a function value.
On the MCore, only r4 can return results. */
CXT is an RTX for the static chain value for the function. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
}
count = INTVAL (operands[2]);
regno = REGNO (operands[0]);
- operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count));
+ operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
for (i = 0; i < count; i++)
XVECEXP (operands[3], 0, i)
- = gen_rtx (SET, VOIDmode,
- gen_rtx (REG, SImode, regno + i),
- gen_rtx (MEM, SImode, plus_constant (stack_pointer_rtx,
+ = gen_rtx_SET (VOIDmode,
+ gen_rtx_REG (SImode, regno + i),
+ gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx,
i * 4)));
}")
count = INTVAL (operands[2]);
regno = REGNO (operands[1]);
- operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count));
+ operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
for (i = 0; i < count; i++)
XVECEXP (operands[3], 0, i)
- = gen_rtx (SET, VOIDmode,
- gen_rtx (MEM, SImode, plus_constant (stack_pointer_rtx,
+ = gen_rtx_SET (VOIDmode,
+ gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx,
i * 4)),
- gen_rtx (REG, SImode, regno + i));
+ gen_rtx_REG (SImode, regno + i));
}")
(define_insn ""
if (GET_CODE (operands[0]) == MEM
&& ! register_operand (XEXP (operands[0], 0), SImode)
&& ! mcore_symbolic_address_p (XEXP (operands[0], 0)))
- operands[0] = gen_rtx (MEM, GET_MODE (operands[0]),
+ operands[0] = gen_rtx_MEM (GET_MODE (operands[0]),
force_reg (Pmode, XEXP (operands[0], 0)));
}")
if (GET_CODE (operands[0]) == MEM
&& ! register_operand (XEXP (operands[0], 0), SImode)
&& ! mcore_symbolic_address_p (XEXP (operands[0], 0)))
- operands[1] = gen_rtx (MEM, GET_MODE (operands[1]),
+ operands[1] = gen_rtx_MEM (GET_MODE (operands[1]),
force_reg (Pmode, XEXP (operands[1], 0)));
}")
; rtx lshft = GEN_INT (32 - (INTVAL (operands[2]) + INTVAL (operands[3])));
; rtx rshft = GEN_INT (32 - INTVAL (operands[2]));
;
-; emit_insn (gen_rtx (SET, SImode, operands[0], operands[1]));
-; emit_insn (gen_rtx (SET, SImode, operands[0],
-; gen_rtx (ASHIFT, SImode, operands[0], lshft)));
-; emit_insn (gen_rtx (SET, SImode, operands[0],
-; gen_rtx (ASHIFTRT, SImode, operands[0], rshft)));
+; emit_insn (gen_rtx_SET (SImode, operands[0], operands[1]));
+; emit_insn (gen_rtx_SET (SImode, operands[0],
+; gen_rtx_ASHIFT (SImode, operands[0], lshft)));
+; emit_insn (gen_rtx_SET (SImode, operands[0],
+; gen_rtx_ASHIFTRT (SImode, operands[0], rshft)));
; DONE;
; }
; else
rtx tmp1 = gen_reg_rtx (SImode);
rtx tmp2 = gen_reg_rtx (SImode);
- emit_insn (gen_rtx (SET, SImode, tmp1, operands[1]));
- emit_insn (gen_rtx (SET, SImode, tmp2,
- gen_rtx (ASHIFT, SImode, tmp1, lshft)));
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (ASHIFTRT, SImode, tmp2, rshft)));
+ emit_insn (gen_rtx_SET (SImode, tmp1, operands[1]));
+ emit_insn (gen_rtx_SET (SImode, tmp2,
+ gen_rtx_ASHIFT (SImode, tmp1, lshft)));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_ASHIFTRT (SImode, tmp2, rshft)));
DONE;
}
else
{
rtx rshft = GEN_INT (INTVAL (operands[3]));
shifted = gen_reg_rtx (SImode);
- emit_insn (gen_rtx (SET, SImode, shifted,
- gen_rtx (LSHIFTRT, SImode, operands[1], rshft)));
+ emit_insn (gen_rtx_SET (SImode, shifted,
+ gen_rtx_LSHIFTRT (SImode, operands[1], rshft)));
}
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (AND, SImode, shifted, mask)));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_AND (SImode, shifted, mask)));
DONE;
}
else if (TARGET_W_FIELD)
rtx tmp1 = gen_reg_rtx (SImode);
rtx tmp2 = gen_reg_rtx (SImode);
- emit_insn (gen_rtx (SET, SImode, tmp1, operands[1]));
- emit_insn (gen_rtx (SET, SImode, tmp2,
- gen_rtx (ASHIFT, SImode, tmp1, lshft)));
- emit_insn (gen_rtx (SET, SImode, operands[0],
- gen_rtx (LSHIFTRT, SImode, tmp2, rshft)));
+ emit_insn (gen_rtx_SET (SImode, tmp1, operands[1]));
+ emit_insn (gen_rtx_SET (SImode, tmp2,
+ gen_rtx_ASHIFT (SImode, tmp1, lshft)));
+ emit_insn (gen_rtx_SET (SImode, operands[0],
+ gen_rtx_LSHIFTRT (SImode, tmp2, rshft)));
DONE;
}
else
abort ();
if (ofs > 0)
- operands[4] = gen_rtx (MEM, mode,
- gen_rtx (PLUS, SImode, base_reg, GEN_INT(ofs)));
+ operands[4] = gen_rtx_MEM (mode,
+ gen_rtx_PLUS (SImode, base_reg, GEN_INT(ofs)));
else
- operands[4] = gen_rtx (MEM, mode, base_reg);
+ operands[4] = gen_rtx_MEM (mode, base_reg);
if (mode == QImode)
return \"movi %0,0\\n\\tst.b %0,%4\";
emit_insn (gen_movsi (tmp, GEN_INT (STACK_UNITS_MAXSTEP)));
do
{
- rtx memref = gen_rtx (MEM, SImode, stack_pointer_rtx);
+ rtx memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
MEM_VOLATILE_P (memref) = 1;
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
/* Extend a step, probe, and adjust remaining count. */
emit_insn(gen_subsi3(stack_pointer_rtx, stack_pointer_rtx, step));
- memref = gen_rtx (MEM, SImode, stack_pointer_rtx);
+ memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
MEM_VOLATILE_P (memref) = 1;
emit_insn(gen_movsi(memref, stack_pointer_rtx));
emit_insn(gen_subsi3(tmp, tmp, step));
{
if (! TARGET_MIPS16)
{
- convert_move (result, gen_rtx (GTU, mode, reg, const0_rtx), 0);
+ convert_move (result, gen_rtx_GTU (mode, reg, const0_rtx), 0);
if (p_invert != NULL)
*p_invert = 0;
invert = 0;
else
{
reg2 = invert ? gen_reg_rtx (mode) : result;
- convert_move (reg2, gen_rtx (LTU, mode, reg, const1_rtx), 0);
+ convert_move (reg2, gen_rtx_LTU (mode, reg, const1_rtx), 0);
reg = reg2;
}
}
reg = reg2;
one = force_reg (mode, const1_rtx);
}
- convert_move (result, gen_rtx (XOR, mode, reg, one), 0);
+ convert_move (result, gen_rtx_XOR (mode, reg, one), 0);
}
return result;
{
/* The mips16 loads the return address into $7, not $31. */
if (TARGET_MIPS16 && (cfun->machine->frame.mask & RA_MASK) != 0)
- emit_jump_insn (gen_return_internal (gen_rtx (REG, Pmode,
+ emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode,
GP_REG_FIRST + 7)));
else
- emit_jump_insn (gen_return_internal (gen_rtx (REG, Pmode,
+ emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode,
GP_REG_FIRST + 31)));
}
}
: ""),
fp_code);
id = get_identifier (buf);
- stub_fn = gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (id));
+ stub_fn = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (id));
- emit_move_insn (gen_rtx (REG, Pmode, 2), fn);
+ emit_move_insn (gen_rtx_REG (Pmode, 2), fn);
if (retval == NULL_RTX)
insn = gen_call_internal (stub_fn, arg_size);
if (GET_CODE (insn) != CALL_INSN)
abort ();
CALL_INSN_FUNCTION_USAGE (insn) =
- gen_rtx (EXPR_LIST, VOIDmode,
- gen_rtx (USE, VOIDmode, gen_rtx (REG, Pmode, 2)),
- CALL_INSN_FUNCTION_USAGE (insn));
+ gen_rtx_EXPR_LIST (VOIDmode,
+ gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, 2)),
+ CALL_INSN_FUNCTION_USAGE (insn));
/* If we are handling a floating point return value, we need to
save $18 in the function prologue. Putting a note on the
code. */
if (fpret)
CALL_INSN_FUNCTION_USAGE (insn) =
- gen_rtx (EXPR_LIST, VOIDmode,
- gen_rtx (USE, VOIDmode, gen_rtx (REG, word_mode, 18)),
- CALL_INSN_FUNCTION_USAGE (insn));
+ gen_rtx_EXPR_LIST (VOIDmode,
+ gen_rtx_USE (VOIDmode,
+ gen_rtx_REG (word_mode, 18)),
+ CALL_INSN_FUNCTION_USAGE (insn));
/* Return 1 to tell the caller that we've generated the call
insn. */
abort ();
CALL_INSN_FUNCTION_USAGE (insn) =
- gen_rtx (EXPR_LIST, VOIDmode,
- gen_rtx (USE, VOIDmode, gen_rtx (REG, word_mode, 18)),
- CALL_INSN_FUNCTION_USAGE (insn));
+ gen_rtx_EXPR_LIST (VOIDmode,
+ gen_rtx_USE (VOIDmode, gen_rtx_REG (word_mode, 18)),
+ CALL_INSN_FUNCTION_USAGE (insn));
/* Return 1 to tell the caller that we've generated the call
insn. */
particular string constant. */
lab = add_constant (&constants, val, mode);
- newsrc = gen_rtx (MEM, mode,
- gen_rtx (LABEL_REF, VOIDmode, lab));
+ newsrc = gen_rtx_MEM (mode,
+ gen_rtx_LABEL_REF (VOIDmode, lab));
RTX_UNCHANGING_P (newsrc) = 1;
- PATTERN (insn) = gen_rtx (SET, VOIDmode,
- SET_DEST (PATTERN (insn)),
- newsrc);
+ PATTERN (insn) = gen_rtx_SET (VOIDmode,
+ SET_DEST (PATTERN (insn)),
+ newsrc);
INSN_CODE (insn) = -1;
if (first_constant_ref < 0)
Before the prologue, RA is at 0(sp). */
#define INCOMING_RETURN_ADDR_RTX \
- gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
+ gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
/* A C expression whose value is RTL representing the value of the
return address for the frame COUNT steps up from the current frame,
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT> 0 && flag_omit_frame_pointer)? NULL_RTX \
- : gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, (FRAME), GEN_INT(4))))
+ : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
/* A C expression whose value is an integer giving the offset, in
bytes, from the value of the stack pointer register to the top of
last = emit_move_insn(temp, temp);
{
rtx divdi, moddi, divsi, modsi;
- divsi = gen_rtx (UDIV, SImode, operands[1], operands[2]);
- modsi = gen_rtx (UMOD, SImode, operands[1], operands[2]);
- divdi = gen_rtx (ZERO_EXTEND, DImode, divsi);
- moddi = gen_rtx (ZERO_EXTEND, DImode, modsi);
- REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
+ divsi = gen_rtx_UDIV (SImode, operands[1], operands[2]);
+ modsi = gen_rtx_UMOD (SImode, operands[1], operands[2]);
+ divdi = gen_rtx_ZERO_EXTEND (DImode, divsi);
+ moddi = gen_rtx_ZERO_EXTEND (DImode, modsi);
+ REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
REG_NOTES (first));
- REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first,
- gen_rtx (EXPR_LIST, REG_EQUAL,
- gen_rtx (IOR, DImode, moddi,
- gen_rtx (ASHIFT, DImode, divdi, GEN_INT(32))),
+ REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
+ gen_rtx_EXPR_LIST (REG_EQUAL,
+ gen_rtx_IOR (DImode, moddi,
+ gen_rtx_ASHIFT (DImode, divdi, GEN_INT(32))),
REG_NOTES (last)));
}
;; last = emit_move_insn(temp, temp);
;; {
;; rtx divdi, moddi, divhi, modhi;
-;; divhi = gen_rtx (UDIV, HImode, operands[1], operands[2]);
-;; modhi = gen_rtx (UMOD, HImode, operands[1], operands[2]);
-;; divdi = gen_rtx (ZERO_EXTEND, DImode, divhi);
-;; moddi = gen_rtx (ZERO_EXTEND, DImode, modhi);
-;; REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
+;; divhi = gen_rtx_UDIV (HImode, operands[1], operands[2]);
+;; modhi = gen_rtx_UMOD (HImode, operands[1], operands[2]);
+;; divdi = gen_rtx_ZERO_EXTEND (DImode, divhi);
+;; moddi = gen_rtx_ZERO_EXTEND (DImode, modhi);
+;; REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
;; REG_NOTES (first));
-;; REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first,
-;; gen_rtx (EXPR_LIST, REG_EQUAL,
+;; REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
+;; gen_rtx_EXPR_LIST (REG_EQUAL,
;; gen_rtx(IOR, DImode, moddi,
;; gen_rtx(ASHIFT, DImode, divdi, GEN_INT(32))),
;; REG_NOTES (last)));
;; last = emit_move_insn(temp, temp);
;; {
;; rtx divdi, moddi, divqi, modqi;
-;; divqi = gen_rtx (UDIV, QImode, operands[1], operands[2]);
-;; modqi = gen_rtx (UMOD, QImode, operands[1], operands[2]);
-;; divdi = gen_rtx (ZERO_EXTEND, DImode, divqi);
-;; moddi = gen_rtx (ZERO_EXTEND, DImode, modqi);
-;; REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
+;; divqi = gen_rtx_UDIV (QImode, operands[1], operands[2]);
+;; modqi = gen_rtx_UMOD (QImode, operands[1], operands[2]);
+;; divdi = gen_rtx_ZERO_EXTEND (DImode, divqi);
+;; moddi = gen_rtx_ZERO_EXTEND (DImode, modqi);
+;; REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
;; REG_NOTES (first));
-;; REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first,
-;; gen_rtx (EXPR_LIST, REG_EQUAL,
+;; REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
+;; gen_rtx_EXPR_LIST (REG_EQUAL,
;; gen_rtx(IOR, DImode, moddi,
;; gen_rtx(ASHIFT, DImode, divdi, GEN_INT(32))),
;; REG_NOTES (last)));
scratch = gen_reg_rtx (mode0);
pat = GEN_FCN (icode) (scratch, op0, op1,
- gen_rtx (SYMBOL_REF, Pmode, opcode));
+ gen_rtx_SYMBOL_REF (Pmode, opcode));
if (! pat)
return 0;
emit_insn (pat);
However, we must be careful to emit correct RTL in
the meantime, so optimizations don't get confused. */
- or1 = gen_rtx (NE, SImode, compare_result, const0_rtx);
- or2 = gen_rtx (NE, SImode, compare_result2, const0_rtx);
+ or1 = gen_rtx_NE (SImode, compare_result, const0_rtx);
+ or2 = gen_rtx_NE (SImode, compare_result2, const0_rtx);
/* OR them together. */
cmp = gen_rtx_SET (VOIDmode, or_result,
return machopic_legitimize_pic_address (mem, Pmode, reg);
}
}
- return gen_rtx (PLUS, Pmode, base, offset);
+ return gen_rtx_PLUS (Pmode, base, offset);
}
/* Fall back on generic machopic code. */
if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
return 0;
else
- return gen_rtx (REG, mode, cum->fprs + 16);
+ return gen_rtx_REG (mode, cum->fprs + 16);
}
else if (s390_function_arg_integer (mode, type))
{
if (cum->gprs + n_gprs > 5)
return 0;
else
- return gen_rtx (REG, mode, cum->gprs + 2);
+ return gen_rtx_REG (mode, cum->gprs + 2);
}
/* After the real arguments, expand_call calls us once again
(reg 15))]
"TARGET_BACKCHAIN"
{
- rtx stack = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
- rtx chain = gen_rtx (MEM, Pmode, stack);
+ rtx stack = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
+ rtx chain = gen_rtx_MEM (Pmode, stack);
rtx temp = gen_reg_rtx (Pmode);
emit_move_insn (temp, chain);
if (REGNO (*where) >= 8 && REGNO (*where) < 24) /* oX or lX */
return 1;
if (! test && REGNO (*where) >= 24 && REGNO (*where) < 32)
- *where = gen_rtx (REG, GET_MODE (*where), OUTGOING_REGNO (REGNO(*where)));
+ *where = gen_rtx_REG (GET_MODE (*where), OUTGOING_REGNO (REGNO(*where)));
case SCRATCH:
case CC0:
case PC:
/* Call __enable_execute_stack after writing onto the stack to make sure
the stack address is accessible. */
#ifdef TRANSFER_FROM_TRAMPOLINE
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"),
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
LCT_NORMAL, VOIDmode, 1, tramp, Pmode);
#endif
/* Call __enable_execute_stack after writing onto the stack to make sure
the stack address is accessible. */
#ifdef TRANSFER_FROM_TRAMPOLINE
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"),
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
LCT_NORMAL, VOIDmode, 1, tramp, Pmode);
#endif
}
{
case MEM:
if (GET_CODE (XEXP (x, 0)) == CONST_INT)
- output_address (gen_rtx_PLUS (SImode, gen_rtx (REG, SImode, 0),
+ output_address (gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
XEXP (x, 0)));
else
output_address (XEXP (x, 0));
rtx addr = ADDR; \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 12)), CHAIN); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 16)), FUNC); \
- emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__xtensa_sync_caches"), \
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__xtensa_sync_caches"), \
0, VOIDmode, 1, addr, Pmode); \
} while (0)
when count == 0 and the stack pointer when count > 0. */
#define DYNAMIC_CHAIN_ADDRESS(frame) \
- gen_rtx (PLUS, Pmode, frame, GEN_INT (-3 * UNITS_PER_WORD))
+ gen_rtx_PLUS (Pmode, frame, GEN_INT (-3 * UNITS_PER_WORD))
/* Define this if the return address of a particular stack frame is
accessed from the frame pointer of the previous stack frame. */
&& xtensa_simm8x256 (INTVAL (plus1) & ~0xff)) \
{ \
rtx temp = gen_reg_rtx (Pmode); \
- emit_insn (gen_rtx (SET, Pmode, temp, \
- gen_rtx (PLUS, Pmode, plus0, \
+ emit_insn (gen_rtx_SET (Pmode, temp, \
+ gen_rtx_PLUS (Pmode, plus0, \
GEN_INT (INTVAL (plus1) & ~0xff)))); \
- (X) = gen_rtx (PLUS, Pmode, temp, \
+ (X) = gen_rtx_PLUS (Pmode, temp, \
GEN_INT (INTVAL (plus1) & 0xff)); \
goto WIN; \
} \
(match_dup 1))]
""
{
- operands[1] = gen_rtx (EQ, SImode, branch_cmp[0], branch_cmp[1]);
+ operands[1] = gen_rtx_EQ (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
(match_dup 1))]
""
{
- operands[1] = gen_rtx (NE, SImode, branch_cmp[0], branch_cmp[1]);
+ operands[1] = gen_rtx_NE (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
(match_dup 1))]
""
{
- operands[1] = gen_rtx (GT, SImode, branch_cmp[0], branch_cmp[1]);
+ operands[1] = gen_rtx_GT (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
(match_dup 1))]
""
{
- operands[1] = gen_rtx (GE, SImode, branch_cmp[0], branch_cmp[1]);
+ operands[1] = gen_rtx_GE (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
(match_dup 1))]
""
{
- operands[1] = gen_rtx (LT, SImode, branch_cmp[0], branch_cmp[1]);
+ operands[1] = gen_rtx_LT (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
(match_dup 1))]
""
{
- operands[1] = gen_rtx (LE, SImode, branch_cmp[0], branch_cmp[1]);
+ operands[1] = gen_rtx_LE (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
projects / gcc.git / commitdiff