struct r300_screen* r300screen =
(struct r300_screen*)r300->context.screen;
CS_LOCALS(r300);
- BEGIN_CS(14);
+ BEGIN_CS(13);
OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6);
OUT_CS(rs->depth_scale_front);
OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
OUT_CS(scissor->scissor_top_left);
OUT_CS(scissor->scissor_bottom_right);
+ END_CS;
}
/* Emit all dirty state. */
return;
}
- BEGIN_CS(161 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2));
+ BEGIN_CS(163 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
CS_LOCALS(r300);
uint i, j;
- BEGIN_CS(vinfo->size);
-
for (i = 0; i < vinfo->num_attribs; i++) {
j = vinfo->attrib[i].src_index;
switch (vinfo->attrib[i].emit) {
break;
}
}
-
- END_CS;
}
static INLINE void r300_emit_prim(struct draw_stage* draw,
OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
OUT_CS(r300->vertex_info.hwfmt[0]);
OUT_CS(r300->vertex_info.hwfmt[1]);
+ END_CS;
BEGIN_CS(2 + (count * r300->vertex_info.size) + 2);
OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, count));