PR26656 testcases

	* testsuite/ld-powerpc/tlsget.d,
	* testsuite/ld-powerpc/tlsget.s,
	* testsuite/ld-powerpc/tlsget.wf,
	* testsuite/ld-powerpc/tlsget2.d.
	* testsuite/ld-powerpc/tlsget2.wf: New testcases.
	* testsuite/ld-powerpc/powerpc.exp: Run them.

diff --git a/ld/ChangeLog b/ld/ChangeLog
index ea28290e7ad0c8b01538c0af212f9281926cd6d0..5cf876a06658a40ede501d10a79116cabe8e14f0 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,12 @@
+2020-09-28  Alan Modra  <amodra@gmail.com>
+
+       * testsuite/ld-powerpc/tlsget.d,
+       * testsuite/ld-powerpc/tlsget.s,
+       * testsuite/ld-powerpc/tlsget.wf,
+       * testsuite/ld-powerpc/tlsget2.d.
+       * testsuite/ld-powerpc/tlsget2.wf: New testcases.
+       * testsuite/ld-powerpc/powerpc.exp: Run them.
+
 2020-09-26  Alan Modra  <amodra@gmail.com>
 
        * testsuite/ld-powerpc/elfv2so.d,

diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp
index 7a49b1a80a3046eb6a9a12d7476c5564e920f1c5..74af28d7421b857772c5bbd65c9d460ef5d88eaf 100644 (file)
--- a/ld/testsuite/ld-powerpc/powerpc.exp
+++ b/ld/testsuite/ld-powerpc/powerpc.exp
@@ -286,6 +286,12 @@ set ppc64elftests {
     {"TLSdesc4" "-melf64ppc --no-tls-optimize tmpdir/tlsdll.o" "" "-a64"  {tlsdesc4.s}
      {{objdump -dr tlsdesc4.d} {readelf -wf tlsdesc4.wf}}
      "tlsdesc4"}
+    {"tlsget" "-shared --hash-style=both -melf64ppc --plt-align=0" "tmpdir/tlsdll.so" "-a64 -mpower10"  {tlsget.s}
+     {{objdump -dr tlsget.d} {readelf -wf tlsget.wf}}
+     "tlsget.so"}
+    {"tlsget2" "-shared --hash-style=both -melf64ppc --plt-align=0 --power10-stubs=yes" "tmpdir/tlsdll.so" "-a64 -mpower10"  {tlsget.s}
+     {{objdump -dr tlsget2.d} {readelf -wf tlsget2.wf}}
+     "tlsget2.so"}
     {"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s}
        {{objdump -dj.data symtocbase.d}} "symtocbase.so"}
     {"TOC opt" "-melf64ppc" "" "-a64"  {tocopt.s}

diff --git a/ld/testsuite/ld-powerpc/tlsget.d b/ld/testsuite/ld-powerpc/tlsget.d
new file mode 100644 (file)
index 0000000..729ee95
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsget.d
@@ -0,0 +1,89 @@
+#source: tlsget.s
+#as: -a64 -mpower10
+#ld: -shared --plt-align=0 tlsdll.so
+#objdump: -dr
+#target: powerpc64*-*-*
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+.* <.*\.plt_call\..*>:
+.*:    (04 10 .. ..|.. .. 10 04)       pld     r12,.*
+.*:    (e5 80 .. ..|.. .. 80 e5) 
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (4e 80 04 20|20 04 80 4e)       bctr
+.*:    (f8 41 00 18|18 00 41 f8)       std     r2,24\(r1\)
+.*:    (e9 82 .. ..|.. .. 82 e9)       ld      r12,.*\(r2\)
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (4e 80 04 20|20 04 80 4e)       bctr
+
+.* <.*\.plt_call\.__tls_get_addr_opt.*>:
+.*:    (e8 03 00 00|00 00 03 e8)       ld      r0,0\(r3\)
+.*:    (e9 83 00 08|08 00 83 e9)       ld      r12,8\(r3\)
+.*:    (2c 20 00 00|00 00 20 2c)       cmpdi   r0,0
+.*:    (7c 60 1b 78|78 1b 60 7c)       mr      r0,r3
+.*:    (7c 6c 6a 14|14 6a 6c 7c)       add     r3,r12,r13
+.*:    (4d 82 00 20|20 00 82 4d)       beqlr
+.*:    (7c 03 03 78|78 03 03 7c)       mr      r3,r0
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (04 10 .. ..|.. .. 10 04)       pld     r12,.*
+.*:    (e5 80 .. ..|.. .. 80 e5) 
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (4e 80 04 20|20 04 80 4e)       bctr
+.*:    (e8 03 00 00|00 00 03 e8)       ld      r0,0\(r3\)
+.*:    (e9 83 00 08|08 00 83 e9)       ld      r12,8\(r3\)
+.*:    (2c 20 00 00|00 00 20 2c)       cmpdi   r0,0
+.*:    (7c 60 1b 78|78 1b 60 7c)       mr      r0,r3
+.*:    (7c 6c 6a 14|14 6a 6c 7c)       add     r3,r12,r13
+.*:    (4d 82 00 20|20 00 82 4d)       beqlr
+.*:    (7c 03 03 78|78 03 03 7c)       mr      r3,r0
+.*:    (7c 08 02 a6|a6 02 08 7c)       mflr    r0
+.*:    (f8 01 00 08|08 00 01 f8)       std     r0,8\(r1\)
+.*:    (f8 41 00 18|18 00 41 f8)       std     r2,24\(r1\)
+.*:    (e9 82 .. ..|.. .. 82 e9)       ld      r12,.*\(r2\)
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (4e 80 04 21|21 04 80 4e)       bctrl
+.*:    (e8 41 00 18|18 00 41 e8)       ld      r2,24\(r1\)
+.*:    (e8 01 00 08|08 00 01 e8)       ld      r0,8\(r1\)
+.*:    (7c 08 03 a6|a6 03 08 7c)       mtlr    r0
+.*:    (4e 80 00 20|20 00 80 4e)       blr
+#...
+
+.* <_start>:
+.*:    (06 10 .. ..|.. .. 10 06)       pla     r3,.*
+.*:    (38 60 .. ..|.. .. 60 38) 
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*\.plt_call\.__tls_get_addr_opt[^\+]*>
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (38 62 .. ..|.. .. 62 38)       addi    r3,r2,.*
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*\.plt_call\.__tls_get_addr_opt.*\+0x30>
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*\.plt_call\..*:[^\+]*>
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*.plt_call\..*:.*\+0x10>
+.*:    (e8 41 00 18|18 00 41 e8)       ld      r2,24\(r1\)
+
+.* <fun>:
+.*:    (06 10 00 00|00 00 10 06)       pla     r3,8
+.*:    (38 60 00 08|08 00 60 38) 
+.*:    (4e 80 00 20|20 00 80 4e)       blr
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (00 00 00 00|90 02 01 00)       .*
+.*:    (00 01 02 90|00 00 00 00)       .*
+
+.* <__glink_PLTresolve>:
+.*:    (7c 08 02 a6|a6 02 08 7c)       mflr    r0
+.*:    (42 9f 00 05|05 00 9f 42)       bcl     20,4\*cr7\+so,.* <__glink_PLTresolve\+0x8>
+.*:    (7d 68 02 a6|a6 02 68 7d)       mflr    r11
+.*:    (7c 08 03 a6|a6 03 08 7c)       mtlr    r0
+.*:    (e8 0b ff f0|f0 ff 0b e8)       ld      r0,-16\(r11\)
+.*:    (7d 8b 60 50|50 60 8b 7d)       subf    r12,r11,r12
+.*:    (7d 60 5a 14|14 5a 60 7d)       add     r11,r0,r11
+.*:    (38 0c ff d4|d4 ff 0c 38)       addi    r0,r12,-44
+.*:    (e9 8b 00 00|00 00 8b e9)       ld      r12,0\(r11\)
+.*:    (78 00 f0 82|82 f0 00 78)       rldicl  r0,r0,62,2
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (e9 6b 00 08|08 00 6b e9)       ld      r11,8\(r11\)
+.*:    (4e 80 04 20|20 04 80 4e)       bctr
+
+.* <__tls_get_addr_opt@plt>:
+.*:    (4b ff .. ..|.. .. ff 4b)       b       .* <__glink_PLTresolve>

diff --git a/ld/testsuite/ld-powerpc/tlsget.s b/ld/testsuite/ld-powerpc/tlsget.s
new file mode 100644 (file)
index 0000000..ac0d03a
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsget.s
@@ -0,0 +1,24 @@
+ .text
+ .abiversion 2
+ .globl _start
+_start:
+ .cfi_startproc
+ pla 3,gd@got@tlsgd@pcrel
+ bl __tls_get_addr@notoc(gd@tlsgd)
+
+ addis 3,2,gd@got@tlsgd@ha
+ addi 3,3,gd@got@tlsgd@l
+ bl __tls_get_addr(gd@tlsgd)
+ nop
+
+ bl fun@notoc
+
+ bl fun
+ nop
+
+ .type fun,@gnu_indirect_function
+fun:
+ pla 3,1f@pcrel
+1:
+ blr
+.cfi_endproc

diff --git a/ld/testsuite/ld-powerpc/tlsget.wf b/ld/testsuite/ld-powerpc/tlsget.wf
new file mode 100644 (file)
index 0000000..bc9ccad
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsget.wf
@@ -0,0 +1,27 @@
+Contents of the .eh_frame section:
+
+0+ 0+10 0+ CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 4
+  Data alignment factor: -8
+  Return address column: 65
+  Augmentation data:     1b
+  DW_CFA_def_cfa: r1 ofs 0
+
+0+14 0+14 0+18 FDE cie=0+ pc=0+280..0+314
+  DW_CFA_advance_loc: 128 to 0+300
+  DW_CFA_offset_extended_sf: r65 at cfa\+8
+  DW_CFA_advance_loc: 16 to .*
+  DW_CFA_restore_extended: r65
+
+0+2c 0+14 0+30 FDE cie=0+ pc=0+380..0+3b8
+  DW_CFA_advance_loc: 8 to 0+388
+  DW_CFA_register: r65 in r0
+  DW_CFA_advance_loc: 8 to .*
+  DW_CFA_restore_extended: r65
+
+0+44 0+10 0+48 FDE cie=0+ pc=0+340..0+374
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop

diff --git a/ld/testsuite/ld-powerpc/tlsget2.d b/ld/testsuite/ld-powerpc/tlsget2.d
new file mode 100644 (file)
index 0000000..a1c77ed
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsget2.d
@@ -0,0 +1,76 @@
+#source: tlsget.s
+#as: -a64 -mpower10
+#ld: -shared --plt-align=0 --power10-stubs=yes tlsdll.so
+#objdump: -dr
+#target: powerpc64*-*-*
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+.* <.*\.plt_call\..*>:
+.*:    (f8 41 00 18|18 00 41 f8)       std     r2,24\(r1\)
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (04 10 .. ..|.. .. 10 04)       pld     r12,.*
+.*:    (e5 80 .. ..|.. .. 80 e5) 
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (4e 80 04 20|20 04 80 4e)       bctr
+
+.* <.*\.plt_call\.__tls_get_addr_opt.*>:
+.*:    (e8 03 00 00|00 00 03 e8)       ld      r0,0\(r3\)
+.*:    (e9 83 00 08|08 00 83 e9)       ld      r12,8\(r3\)
+.*:    (2c 20 00 00|00 00 20 2c)       cmpdi   r0,0
+.*:    (7c 60 1b 78|78 1b 60 7c)       mr      r0,r3
+.*:    (7c 6c 6a 14|14 6a 6c 7c)       add     r3,r12,r13
+.*:    (4d 82 00 20|20 00 82 4d)       beqlr
+.*:    (7c 03 03 78|78 03 03 7c)       mr      r3,r0
+.*:    (7c 08 02 a6|a6 02 08 7c)       mflr    r0
+.*:    (f8 01 00 08|08 00 01 f8)       std     r0,8\(r1\)
+.*:    (f8 41 00 18|18 00 41 f8)       std     r2,24\(r1\)
+.*:    (04 10 .. ..|.. .. 10 04)       pld     r12,.*
+.*:    (e5 80 .. ..|.. .. 80 e5) 
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (4e 80 04 21|21 04 80 4e)       bctrl
+.*:    (e8 41 00 18|18 00 41 e8)       ld      r2,24\(r1\)
+.*:    (e8 01 00 08|08 00 01 e8)       ld      r0,8\(r1\)
+.*:    (7c 08 03 a6|a6 03 08 7c)       mtlr    r0
+.*:    (4e 80 00 20|20 00 80 4e)       blr
+#...
+
+.* <_start>:
+.*:    (06 10 .. ..|.. .. 10 06)       pla     r3,.*
+.*:    (38 60 .. ..|.. .. 60 38) 
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*\.plt_call\.__tls_get_addr_opt[^\+]*>
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (38 62 .. ..|.. .. 62 38)       addi    r3,r2,.*
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*\.plt_call\.__tls_get_addr_opt[^\+]*>
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*\.plt_call\..*:.*\+0x4>
+.*:    (4b ff .. ..|.. .. ff 4b)       bl      .* <.*.plt_call\..*:[^\+]*>
+.*:    (e8 41 00 18|18 00 41 e8)       ld      r2,24\(r1\)
+
+.* <fun>:
+.*:    (06 10 00 00|00 00 10 06)       pla     r3,8
+.*:    (38 60 00 08|08 00 60 38) 
+.*:    (4e 80 00 20|20 00 80 4e)       blr
+.*:    (60 00 00 00|00 00 00 60)       nop
+.*:    (00 00 00 00|d0 02 01 00)       .*
+.*:    (00 01 02 d0|00 00 00 00)       .*
+
+.* <__glink_PLTresolve>:
+.*:    (7c 08 02 a6|a6 02 08 7c)       mflr    r0
+.*:    (42 9f 00 05|05 00 9f 42)       bcl     20,4\*cr7\+so,.* <__glink_PLTresolve\+0x8>
+.*:    (7d 68 02 a6|a6 02 68 7d)       mflr    r11
+.*:    (7c 08 03 a6|a6 03 08 7c)       mtlr    r0
+.*:    (e8 0b ff f0|f0 ff 0b e8)       ld      r0,-16\(r11\)
+.*:    (7d 8b 60 50|50 60 8b 7d)       subf    r12,r11,r12
+.*:    (7d 60 5a 14|14 5a 60 7d)       add     r11,r0,r11
+.*:    (38 0c ff d4|d4 ff 0c 38)       addi    r0,r12,-44
+.*:    (e9 8b 00 00|00 00 8b e9)       ld      r12,0\(r11\)
+.*:    (78 00 f0 82|82 f0 00 78)       rldicl  r0,r0,62,2
+.*:    (7d 89 03 a6|a6 03 89 7d)       mtctr   r12
+.*:    (e9 6b 00 08|08 00 6b e9)       ld      r11,8\(r11\)
+.*:    (4e 80 04 20|20 04 80 4e)       bctr
+
+.* <__tls_get_addr_opt@plt>:
+.*:    (4b ff .. ..|.. .. ff 4b)       b       .* <__glink_PLTresolve>

diff --git a/ld/testsuite/ld-powerpc/tlsget2.wf b/ld/testsuite/ld-powerpc/tlsget2.wf
new file mode 100644 (file)
index 0000000..359e62d
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsget2.wf
@@ -0,0 +1,27 @@
+Contents of the .eh_frame section:
+
+0+ 0+10 0+ CIE
+  Version:               1
+  Augmentation:          "zR"
+  Code alignment factor: 4
+  Data alignment factor: -8
+  Return address column: 65
+  Augmentation data:     1b
+  DW_CFA_def_cfa: r1 ofs 0
+
+0+14 0+14 0+18 FDE cie=0+ pc=0+280..0+2e0
+  DW_CFA_advance_loc: 76 to 0+2cc
+  DW_CFA_offset_extended_sf: r65 at cfa\+8
+  DW_CFA_advance_loc: 16 to .*
+  DW_CFA_restore_extended: r65
+
+0+2c 0+14 0+30 FDE cie=0+ pc=0+340..0+378
+  DW_CFA_advance_loc: 8 to 0+348
+  DW_CFA_register: r65 in r0
+  DW_CFA_advance_loc: 8 to .*
+  DW_CFA_restore_extended: r65
+
+0+44 0+10 0+48 FDE cie=0+ pc=0+300..0+334
+  DW_CFA_nop
+  DW_CFA_nop
+  DW_CFA_nop