i965g: Fix assertion that was always true.

surface_format field is a 9-bit field and the value of
BRW_SURFACEFORMAT_INVALID exceeds 9 bits.

diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c
index f9f17bdabac917d448739dc588efd8a06db013d9..40930da882c44aecdad266e2af6b813e12307e8d 100644 (file)
--- a/src/gallium/drivers/i965/brw_screen_texture.c
+++ b/src/gallium/drivers/i965/brw_screen_texture.c
@@ -315,6 +315,7 @@ brw_texture_from_handle(struct pipe_screen *screen,
    struct brw_winsys_buffer *buffer;
    unsigned tiling;
    unsigned pitch;
+   GLuint format;
 
    if (templ->target != PIPE_TEXTURE_2D ||
        templ->last_level != 0 ||
@@ -362,8 +363,10 @@ brw_texture_from_handle(struct pipe_screen *screen,
 
    tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
    tex->ss.ss0.surface_type = translate_tex_target(tex->base.target);
-   tex->ss.ss0.surface_format = translate_tex_format(tex->base.format);
-   assert(tex->ss.ss0.surface_format != BRW_SURFACEFORMAT_INVALID);
+
+   format = translate_tex_format(tex->base.format);
+   assert(format != BRW_SURFACEFORMAT_INVALID);
+   tex->ss.ss0.surface_format = format;
 
    /* This is ok for all textures with channel width 8bit or less:
     */