ARM: Fix Uncachable TLB requests and decoding of xn bit

diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index e17e150542024ab23a3a4f22f63a61ae6aa63dae..6dcb387a3656a55f611e4c102dbbb74a06b8711d 100644 (file)
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -165,8 +165,12 @@ TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint8_t _cid, TLB::Mode _
         assert(stateQueue.size() < 5);
         currState = NULL;
     } else {
+        Request::Flags flag = 0;
+        if (currState->sctlr.c == 0){
+           flag = Request::UNCACHEABLE;
+        }
         port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
-                NULL, (uint8_t*)&currState->l1Desc.data, (Tick)0);
+                NULL, (uint8_t*)&currState->l1Desc.data, (Tick)0, flag);
         doL1Descriptor();
         f = currState->fault;
     }

diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index 12c839d54aa18e3a5b5fcaee29ddd9dae178eee3..2a93c4460a8fbd3c453eae9733cd7e247cb6f9ee 100644 (file)
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -107,13 +107,13 @@ class TableWalker : public MemObject
         /** Is the translation global (no asid used)? */
         bool global() const
         {
-            return bits(data, 4);
+            return bits(data, 17);
         }
 
         /** Is the translation not allow execution? */
         bool xn() const
         {
-            return bits(data, 17);
+            return bits(data, 4);
         }
 
         /** Three bit access protection flags */

diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index afa45901a64ae07a934452e752e19a82a24b1e86..da2a34084e8badc00acc36d1ba8889598f1e1df9 100644 (file)
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -363,6 +363,10 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
        req->setFlags(Request::UNCACHEABLE);
        return NoFault;
     }
+    if ((req->isInstFetch() && (!sctlr.i)) ||
+        ((!req->isInstFetch()) && (!sctlr.c))){
+       req->setFlags(Request::UNCACHEABLE);
+    }
     if (!is_fetch) {
         assert(flags & MustBeOne);
         if (sctlr.a || !(flags & AllowUnaligned)) {