+2017-04-21 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*extzvqi_mem_rex64): Move above *extzv<mode>.
+ Remove UNSPEC_NOREX_MEM tag. Update corresponding peephole2 pattern.
+ (*insvqi_1_mem_rex64): Move above insv<mode>_1. Remove
+ UNSPEC_NOREX_MEM tag. Update corresponding peephole2 pattern.
+ (UNSPEC_NOREX_MEM): Remove definition.
+
2017-04-21 Richard Biener <rguenther@suse.de>
PR tree-optimization/79547
(build_array_type): Likewise. Add typeless_storage argument.
2017-04-19 Eric Botcazou <ebotcazou@adacore.com>
- Jakub Jelinek <jakub@redhat.com>
+ Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/80426
* tree-vrp.c (extract_range_from_binary_expr_1): For an additive
are only used in debug insns.
2017-04-19 Eric Botcazou <ebotcazou@adacore.com>
- Vladimir Makarov <vmakarov@redhat.com>
+ Vladimir Makarov <vmakarov@redhat.com>
* config/sparc/predicates.md (input_operand): Add comment. Return
true for any memory operand when LRA is in progress.
2017-04-12 Jan Hubicka <hubicka@ucw.cz>
- PR lto/69953
+ PR lto/69953
* ipa-visibility.c (non_local_p): Fix typos.
(localize_node): When localizing symbol in same comdat group,
dissolve the group only when we know external symbols are going
UNSPEC_STOS
UNSPEC_PEEPSIB
UNSPEC_INSN_FALSE_DEP
- UNSPEC_NOREX_MEM
;; For SSE/MMX support:
UNSPEC_FIX_NOTRUNC
operands[1] = copy_to_reg (operands[1]);
})
-(define_insn "*extzv<mode>"
- [(set (match_operand:SWI248 0 "register_operand" "=R")
- (zero_extract:SWI248 (match_operand 1 "ext_register_operand" "Q")
- (const_int 8)
- (const_int 8)))]
- ""
- "movz{bl|x}\t{%h1, %k0|%k0, %h1}"
- [(set_attr "type" "imovx")
- (set_attr "mode" "SI")])
-
(define_insn "*extzvqi_mem_rex64"
[(set (match_operand:QI 0 "norex_memory_operand" "=Bn")
(subreg:QI
(zero_extract:SI (match_operand 1 "ext_register_operand" "Q")
(const_int 8)
- (const_int 8)) 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)]
+ (const_int 8)) 0))]
"TARGET_64BIT && reload_completed"
"mov{b}\t{%h1, %0|%0, %h1}"
[(set_attr "type" "imov")
(set_attr "mode" "QI")])
+(define_insn "*extzv<mode>"
+ [(set (match_operand:SWI248 0 "register_operand" "=R")
+ (zero_extract:SWI248 (match_operand 1 "ext_register_operand" "Q")
+ (const_int 8)
+ (const_int 8)))]
+ ""
+ "movz{bl|x}\t{%h1, %k0|%k0, %h1}"
+ [(set_attr "type" "imovx")
+ (set_attr "mode" "SI")])
+
(define_insn "*extzvqi"
[(set (match_operand:QI 0 "nonimmediate_operand" "=QBc,?R,m")
(subreg:QI
(set (match_operand:QI 2 "norex_memory_operand") (match_dup 0))]
"TARGET_64BIT
&& peep2_reg_dead_p (2, operands[0])"
- [(parallel
- [(set (match_dup 2)
- (subreg:QI
- (zero_extract:SI (match_dup 1)
- (const_int 8)
- (const_int 8)) 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)])])
+ [(set (match_dup 2)
+ (subreg:QI
+ (zero_extract:SI (match_dup 1)
+ (const_int 8)
+ (const_int 8)) 0))])
(define_expand "insv<mode>"
[(set (zero_extract:SWI248 (match_operand:SWI248 0 "register_operand")
DONE;
})
+(define_insn "*insvqi_1_mem_rex64"
+ [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
+ (const_int 8)
+ (const_int 8))
+ (subreg:SI
+ (match_operand:QI 1 "norex_memory_operand" "Bn") 0))]
+ "TARGET_64BIT && reload_completed"
+ "mov{b}\t{%1, %h0|%h0, %1}"
+ [(set_attr "type" "imov")
+ (set_attr "mode" "QI")])
+
(define_insn "insv<mode>_1"
[(set (zero_extract:SWI248 (match_operand 0 "ext_register_operand" "+Q,Q")
(const_int 8)
(set_attr "type" "imov")
(set_attr "mode" "QI")])
-(define_insn "*insvqi_1_mem_rex64"
- [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
- (const_int 8)
- (const_int 8))
- (subreg:SI
- (match_operand:QI 1 "norex_memory_operand" "Bn") 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)]
- "TARGET_64BIT && reload_completed"
- "mov{b}\t{%1, %h0|%h0, %1}"
- [(set_attr "type" "imov")
- (set_attr "mode" "QI")])
-
(define_insn "*insvqi_1"
[(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q,Q")
(const_int 8)
(subreg:SI (match_dup 0) 0))]
"TARGET_64BIT
&& peep2_reg_dead_p (2, operands[0])"
- [(parallel
- [(set (zero_extract:SI (match_dup 2)
- (const_int 8)
- (const_int 8))
- (subreg:SI (match_dup 1) 0))
- (unspec [(const_int 0)] UNSPEC_NOREX_MEM)])])
+ [(set (zero_extract:SI (match_dup 2)
+ (const_int 8)
+ (const_int 8))
+ (subreg:SI (match_dup 1) 0))])
(define_code_iterator any_extract [sign_extract zero_extract])