v2: Style fixes.
Reviewed-by: Matt Turner <mattst88@gmail.com>
}
break;
}
+ case SHADER_OPCODE_BROADCAST:
+ if (is_uniform(inst->src[0])) {
+ inst->opcode = BRW_OPCODE_MOV;
+ inst->sources = 1;
+ inst->force_writemask_all = true;
+ progress = true;
+ } else if (inst->src[1].file == IMM) {
+ inst->opcode = BRW_OPCODE_MOV;
+ inst->src[0] = component(inst->src[0],
+ inst->src[1].fixed_hw_reg.dw1.ud);
+ inst->sources = 1;
+ inst->force_writemask_all = true;
+ progress = true;
+ }
+ break;
+
default:
break;
}
break;
case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
+ case SHADER_OPCODE_BROADCAST:
inst->src[i] = val;
progress = true;
break;
case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
case FS_OPCODE_CINTERP:
case FS_OPCODE_LINTERP:
+ case SHADER_OPCODE_BROADCAST:
return true;
case SHADER_OPCODE_RCP:
case SHADER_OPCODE_RSQ:
return reg;
}
+static inline bool
+is_uniform(const fs_reg ®)
+{
+ return (reg.width == 1 || reg.stride == 0 || reg.is_null()) &&
+ (!reg.reladdr || is_uniform(*reg.reladdr));
+}
+
/**
* Get either of the 8-component halves of a 16-component register.
*
return reg;
}
+static inline bool
+is_uniform(const src_reg ®)
+{
+ return (reg.file == IMM || reg.file == UNIFORM || reg.is_null()) &&
+ (!reg.reladdr || is_uniform(*reg.reladdr));
+}
+
class dst_reg : public backend_reg
{
public:
}
break;
}
+ case SHADER_OPCODE_BROADCAST:
+ if (is_uniform(inst->src[0]) ||
+ inst->src[1].is_zero()) {
+ inst->opcode = BRW_OPCODE_MOV;
+ inst->src[1] = src_reg();
+ inst->force_writemask_all = true;
+ progress = true;
+ }
+ break;
+
default:
break;
}
switch (inst->opcode) {
case BRW_OPCODE_MOV:
+ case SHADER_OPCODE_BROADCAST:
inst->src[arg] = value;
return true;
case BRW_OPCODE_MAD:
case BRW_OPCODE_LRP:
case VEC4_OPCODE_UNPACK_UNIFORM:
+ case SHADER_OPCODE_BROADCAST:
return true;
case SHADER_OPCODE_RCP:
case SHADER_OPCODE_RSQ: