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diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn
index 27be6d4ed50cacdc1121a7c98528450402417285..f3188db647e462d162c349d92fb13f9abaac5c0c 100644 (file)
--- a/openpower/sv/av_opcodes.mdwn
+++ b/openpower/sv/av_opcodes.mdwn
@@ -106,6 +106,8 @@ The spec says the max relative inaccuracy is 1/4096.
 
 *In conjunction with the FPSPR "accuracy" bit These could be done by assigning meaning to the "sat mode" SVP64 bits in a FP context. 0b00 is IEEE754 FP, 0b01 is 2^12 accuracy for FP32. These can be applied to standard scalar FP ops*
 
+The other alternative is to use the "single precision" FP operations on a 32-bit elwidth override.  As explained in [[sv/]] this halves the precision.
+
 ## vec_madd(s) - FMA, multiply-add, optionally saturated
 
     a * b + c