(no commit message)

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index 600e68de7024a717799ebb379a5767414a2ab428..a94caed5e78dcd23b3d27d00d32b94a7af48465d 100644 (file)
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -738,7 +738,8 @@ illustration of normal mode add operation: zeroing not included, elwidth
 overrides not included.  if there is no predicate, it is set to all 1s
 
     function op_add(rd, rs1, rs2) # add not VADD!
-      int i, id=0, irs1=0, irs2=0; predval = get_pred_val(FALSE, rd);
+      int i, id=0, irs1=0, irs2=0;
+      predval = get_pred_val(FALSE, rd);
       for (i = 0; i < VL; i++)
         STATE.srcoffs = i # save context
         if (predval & 1<<i) # predication uses intregs