const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session)
{
+ const struct ilo_shader_state *fs = vec->fs;
+ const struct ilo_fb_state *fb = &vec->fb;
+ uint32_t *surface_state;
+ int base, count, i;
+
ILO_DEV_ASSERT(r->dev, 6, 7.5);
- /* SURFACE_STATEs for render targets */
- if (DIRTY(FB)) {
- const struct ilo_fb_state *fb = &vec->fb;
- const int offset = ILO_WM_DRAW_SURFACE(0);
- uint32_t *surface_state = &r->state.wm.SURFACE_STATE[offset];
- int i;
+ if (!DIRTY(FS) && !DIRTY(FB))
+ return;
+ if (!fs)
+ return;
+
+ session->binding_table_fs_changed = true;
- for (i = 0; i < fb->state.nr_cbufs; i++) {
+ base = ilo_shader_get_kernel_param(fs, ILO_KERNEL_FS_SURFACE_RT_BASE);
+ count = ilo_shader_get_kernel_param(fs, ILO_KERNEL_FS_SURFACE_RT_COUNT);
+
+ /* SURFACE_STATEs for render targets */
+ surface_state = &r->state.wm.SURFACE_STATE[base];
+ for (i = 0; i < count; i++) {
+ if (i < fb->state.nr_cbufs && fb->state.cbufs[i]) {
const struct ilo_surface_cso *surface =
(const struct ilo_surface_cso *) fb->state.cbufs[i];
- if (!surface) {
- surface_state[i] =
- gen6_SURFACE_STATE(r->builder, &fb->null_rt, true);
- } else {
- assert(surface && surface->is_rt);
- surface_state[i] =
- gen6_SURFACE_STATE(r->builder, &surface->u.rt, true);
- }
- }
-
- /*
- * Upload at least one render target, as
- * brw_update_renderbuffer_surfaces() does. I don't know why.
- */
- if (i == 0) {
+ assert(surface->is_rt);
+ surface_state[i] =
+ gen6_SURFACE_STATE(r->builder, &surface->u.rt, true);
+ } else {
surface_state[i] =
gen6_SURFACE_STATE(r->builder, &fb->null_rt, true);
-
- i++;
}
-
- memset(&surface_state[i], 0, (ILO_MAX_DRAW_BUFFERS - i) * 4);
-
- if (i && session->num_surfaces[PIPE_SHADER_FRAGMENT] < offset + i)
- session->num_surfaces[PIPE_SHADER_FRAGMENT] = offset + i;
-
- session->binding_table_fs_changed = true;
}
}
const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session)
{
+ const struct ilo_shader_state *vs = vec->vs;
+ const struct ilo_shader_state *gs = vec->gs;
const struct ilo_so_state *so = &vec->so;
+ const struct pipe_stream_output_info *so_info;
+ uint32_t *surface_state;
+ int base, count, i;
ILO_DEV_ASSERT(r->dev, 6, 6);
- /* SURFACE_STATEs for stream output targets */
- if (DIRTY(VS) || DIRTY(GS) || DIRTY(SO)) {
- const struct pipe_stream_output_info *so_info =
- (vec->gs) ? ilo_shader_get_kernel_so_info(vec->gs) :
- (vec->vs) ? ilo_shader_get_kernel_so_info(vec->vs) : NULL;
- const int offset = ILO_GS_SO_SURFACE(0);
- uint32_t *surface_state = &r->state.gs.SURFACE_STATE[offset];
- int i;
-
- for (i = 0; so_info && i < so_info->num_outputs; i++) {
- const int target = so_info->output[i].output_buffer;
- const struct pipe_stream_output_target *so_target =
- (target < so->count) ? so->states[target] : NULL;
+ if (!DIRTY(VS) && !DIRTY(GS) && !DIRTY(SO))
+ return;
- if (so_target) {
- surface_state[i] = gen6_so_SURFACE_STATE(r->builder,
- so_target, so_info, i);
- } else {
- surface_state[i] = 0;
- }
- }
+ if (gs) {
+ so_info = ilo_shader_get_kernel_so_info(gs);
+ base = ilo_shader_get_kernel_param(gs,
+ ILO_KERNEL_GS_GEN6_SURFACE_SO_BASE);
+ count = ilo_shader_get_kernel_param(gs,
+ ILO_KERNEL_GS_GEN6_SURFACE_SO_COUNT);
+ } else if (vs) {
+ so_info = ilo_shader_get_kernel_so_info(vs);
+ base = 0;
+ count = ilo_shader_get_kernel_param(vs,
+ ILO_KERNEL_VS_GEN6_SO_SURFACE_COUNT);
+ } else {
+ return;
+ }
- memset(&surface_state[i], 0, (ILO_MAX_SO_BINDINGS - i) * 4);
+ session->binding_table_gs_changed = true;
- if (i && session->num_surfaces[PIPE_SHADER_GEOMETRY] < offset + i)
- session->num_surfaces[PIPE_SHADER_GEOMETRY] = offset + i;
+ /* SURFACE_STATEs for stream output targets */
+ surface_state = &r->state.gs.SURFACE_STATE[base];
+ for (i = 0; i < count; i++) {
+ if (so_info && i < so_info->num_outputs &&
+ so_info->output[i].output_buffer < so->count &&
+ so->states[so_info->output[i].output_buffer]) {
+ const struct pipe_stream_output_target *so_target =
+ so->states[so_info->output[i].output_buffer];
- session->binding_table_gs_changed = true;
+ surface_state[i] = gen6_so_SURFACE_STATE(r->builder,
+ so_target, so_info, i);
+ } else {
+ surface_state[i] = 0;
+ }
}
}
struct ilo_render_draw_session *session)
{
const struct ilo_view_state *view = &vec->view[shader_type];
+ const struct ilo_shader_state *sh;
uint32_t *surface_state;
- int offset, i;
- bool skip = false;
+ int base, count, i;
ILO_DEV_ASSERT(r->dev, 6, 7.5);
- /* SURFACE_STATEs for sampler views */
switch (shader_type) {
case PIPE_SHADER_VERTEX:
- if (DIRTY(VIEW_VS)) {
- offset = ILO_VS_TEXTURE_SURFACE(0);
- surface_state = &r->state.vs.SURFACE_STATE[offset];
+ if (!DIRTY(VS) && !DIRTY(VIEW_VS))
+ return;
+ if (!vec->vs)
+ return;
- session->binding_table_vs_changed = true;
- } else {
- skip = true;
- }
+ sh = vec->vs;
+ surface_state = r->state.vs.SURFACE_STATE;
+ session->binding_table_vs_changed = true;
break;
case PIPE_SHADER_FRAGMENT:
- if (DIRTY(VIEW_FS)) {
- offset = ILO_WM_TEXTURE_SURFACE(0);
- surface_state = &r->state.wm.SURFACE_STATE[offset];
+ if (!DIRTY(FS) && !DIRTY(VIEW_FS))
+ return;
+ if (!vec->fs)
+ return;
- session->binding_table_fs_changed = true;
- } else {
- skip = true;
- }
+ sh = vec->fs;
+ surface_state = r->state.wm.SURFACE_STATE;
+ session->binding_table_fs_changed = true;
break;
default:
- skip = true;
+ return;
break;
}
- if (skip)
- return;
+ base = ilo_shader_get_kernel_param(sh, ILO_KERNEL_SURFACE_TEX_BASE);
+ count = ilo_shader_get_kernel_param(sh, ILO_KERNEL_SURFACE_TEX_COUNT);
- for (i = 0; i < view->count; i++) {
- if (view->states[i]) {
+ /* SURFACE_STATEs for sampler views */
+ surface_state += base;
+ for (i = 0; i < count; i++) {
+ if (i < view->count && view->states[i]) {
const struct ilo_view_cso *cso =
(const struct ilo_view_cso *) view->states[i];
surface_state[i] = 0;
}
}
-
- memset(&surface_state[i], 0, (ILO_MAX_SAMPLER_VIEWS - i) * 4);
-
- if (i && session->num_surfaces[shader_type] < offset + i)
- session->num_surfaces[shader_type] = offset + i;
}
static void
struct ilo_render_draw_session *session)
{
const struct ilo_cbuf_state *cbuf = &vec->cbuf[shader_type];
+ const struct ilo_shader_state *sh;
uint32_t *surface_state;
- bool *binding_table_changed;
- int offset, count, i;
+ int base, count, i;
ILO_DEV_ASSERT(r->dev, 6, 7.5);
- if (!DIRTY(CBUF))
- return;
-
- /* SURFACE_STATEs for constant buffers */
switch (shader_type) {
case PIPE_SHADER_VERTEX:
- offset = ILO_VS_CONST_SURFACE(0);
- surface_state = &r->state.vs.SURFACE_STATE[offset];
- binding_table_changed = &session->binding_table_vs_changed;
+ if (!DIRTY(VS) && !DIRTY(CBUF))
+ return;
+ if (!vec->vs)
+ return;
+
+ sh = vec->vs;
+ surface_state = r->state.vs.SURFACE_STATE;
+ session->binding_table_vs_changed = true;
break;
case PIPE_SHADER_FRAGMENT:
- offset = ILO_WM_CONST_SURFACE(0);
- surface_state = &r->state.wm.SURFACE_STATE[offset];
- binding_table_changed = &session->binding_table_fs_changed;
+ if (!DIRTY(FS) && !DIRTY(CBUF))
+ return;
+ if (!vec->fs)
+ return;
+
+ sh = vec->fs;
+ surface_state = r->state.wm.SURFACE_STATE;
+ session->binding_table_fs_changed = true;
break;
default:
return;
break;
}
- /* constants are pushed via PCB */
- if (cbuf->enabled_mask == 0x1 && !cbuf->cso[0].resource) {
- memset(surface_state, 0, ILO_MAX_CONST_BUFFERS * 4);
- return;
- }
+ base = ilo_shader_get_kernel_param(sh, ILO_KERNEL_SURFACE_CONST_BASE);
+ count = ilo_shader_get_kernel_param(sh, ILO_KERNEL_SURFACE_CONST_COUNT);
- count = util_last_bit(cbuf->enabled_mask);
+ /* SURFACE_STATEs for constant buffers */
+ surface_state += base;
for (i = 0; i < count; i++) {
- if (cbuf->cso[i].resource) {
+ const struct ilo_cbuf_cso *cso = &cbuf->cso[i];
+
+ if (cso->resource) {
surface_state[i] = gen6_SURFACE_STATE(r->builder,
- &cbuf->cso[i].surface, false);
+ &cso->surface, false);
} else {
surface_state[i] = 0;
}
}
-
- memset(&surface_state[count], 0, (ILO_MAX_CONST_BUFFERS - count) * 4);
-
- if (count && session->num_surfaces[shader_type] < offset + count)
- session->num_surfaces[shader_type] = offset + count;
-
- *binding_table_changed = true;
}
static void
int shader_type,
struct ilo_render_draw_session *session)
{
- uint32_t *binding_table_state, *surface_state;
- int *binding_table_state_size, size;
- bool skip = false;
+ int count;
ILO_DEV_ASSERT(r->dev, 6, 7.5);
/* BINDING_TABLE_STATE */
switch (shader_type) {
case PIPE_SHADER_VERTEX:
- surface_state = r->state.vs.SURFACE_STATE;
- binding_table_state = &r->state.vs.BINDING_TABLE_STATE;
- binding_table_state_size = &r->state.vs.BINDING_TABLE_STATE_size;
+ if (!session->binding_table_vs_changed)
+ return;
+ if (!vec->vs)
+ return;
+
+ count = ilo_shader_get_kernel_param(vec->vs,
+ ILO_KERNEL_SURFACE_TOTAL_COUNT);
- skip = !session->binding_table_vs_changed;
+ r->state.vs.BINDING_TABLE_STATE = gen6_BINDING_TABLE_STATE(r->builder,
+ r->state.vs.SURFACE_STATE, count);
break;
case PIPE_SHADER_GEOMETRY:
- surface_state = r->state.gs.SURFACE_STATE;
- binding_table_state = &r->state.gs.BINDING_TABLE_STATE;
- binding_table_state_size = &r->state.gs.BINDING_TABLE_STATE_size;
+ if (!session->binding_table_gs_changed)
+ return;
+ if (vec->gs) {
+ count = ilo_shader_get_kernel_param(vec->gs,
+ ILO_KERNEL_SURFACE_TOTAL_COUNT);
+ } else if (ilo_dev_gen(r->dev) == ILO_GEN(6) && vec->vs) {
+ count = ilo_shader_get_kernel_param(vec->vs,
+ ILO_KERNEL_VS_GEN6_SO_SURFACE_COUNT);
+ } else {
+ return;
+ }
- skip = !session->binding_table_gs_changed;
+ r->state.gs.BINDING_TABLE_STATE = gen6_BINDING_TABLE_STATE(r->builder,
+ r->state.gs.SURFACE_STATE, count);
break;
case PIPE_SHADER_FRAGMENT:
- surface_state = r->state.wm.SURFACE_STATE;
- binding_table_state = &r->state.wm.BINDING_TABLE_STATE;
- binding_table_state_size = &r->state.wm.BINDING_TABLE_STATE_size;
+ if (!session->binding_table_fs_changed)
+ return;
+ if (!vec->fs)
+ return;
+
+ count = ilo_shader_get_kernel_param(vec->fs,
+ ILO_KERNEL_SURFACE_TOTAL_COUNT);
- skip = !session->binding_table_fs_changed;
+ r->state.wm.BINDING_TABLE_STATE = gen6_BINDING_TABLE_STATE(r->builder,
+ r->state.wm.SURFACE_STATE, count);
break;
default:
- skip = true;
break;
}
-
- if (skip)
- return;
-
- /*
- * If we have seemingly less SURFACE_STATEs than before, it could be that
- * we did not touch those reside at the tail in this upload. Loop over
- * them to figure out the real number of SURFACE_STATEs.
- */
- for (size = *binding_table_state_size;
- size > session->num_surfaces[shader_type]; size--) {
- if (surface_state[size - 1])
- break;
- }
- if (size < session->num_surfaces[shader_type])
- size = session->num_surfaces[shader_type];
-
- *binding_table_state = gen6_BINDING_TABLE_STATE(r->builder,
- surface_state, size);
- *binding_table_state_size = size;
}
#undef DIRTY
switch (sh_type) {
case PIPE_SHADER_VERTEX:
- if (vec->view[sh_type].count) {
- num_surfaces = ILO_VS_TEXTURE_SURFACE(vec->view[sh_type].count);
- } else {
- num_surfaces = ILO_VS_CONST_SURFACE(
- util_last_bit(vec->cbuf[sh_type].enabled_mask));
- }
-
if (vec->vs) {
- if (ilo_dev_gen(render->dev) == ILO_GEN(6)) {
- const struct pipe_stream_output_info *so_info =
- ilo_shader_get_kernel_so_info(vec->vs);
+ num_surfaces = ilo_shader_get_kernel_param(vec->vs,
+ ILO_KERNEL_SURFACE_TOTAL_COUNT);
- /* stream outputs */
- num_surfaces += so_info->num_outputs;
+ if (ilo_dev_gen(render->dev) == ILO_GEN(6)) {
+ num_surfaces += ilo_shader_get_kernel_param(vec->vs,
+ ILO_KERNEL_VS_GEN6_SO_SURFACE_COUNT);
}
}
break;
case PIPE_SHADER_GEOMETRY:
- if (vec->gs && ilo_dev_gen(render->dev) == ILO_GEN(6)) {
- const struct pipe_stream_output_info *so_info =
- ilo_shader_get_kernel_so_info(vec->gs);
-
- /* stream outputs */
- num_surfaces += so_info->num_outputs;
+ if (vec->gs) {
+ num_surfaces = ilo_shader_get_kernel_param(vec->gs,
+ ILO_KERNEL_SURFACE_TOTAL_COUNT);
}
break;
case PIPE_SHADER_FRAGMENT:
- if (vec->view[sh_type].count) {
- num_surfaces = ILO_WM_TEXTURE_SURFACE(vec->view[sh_type].count);
- } else if (vec->cbuf[sh_type].enabled_mask) {
- num_surfaces = ILO_WM_CONST_SURFACE(
- util_last_bit(vec->cbuf[sh_type].enabled_mask));
- } else {
- num_surfaces = vec->fb.state.nr_cbufs;
+ if (vec->fs) {
+ num_surfaces = ilo_shader_get_kernel_param(vec->fs,
+ ILO_KERNEL_SURFACE_TOTAL_COUNT);
}
break;
default:
simd_mode,
GEN6_MSG_SAMPLER_LD,
0,
- ILO_WM_CONST_SURFACE(dim));
+ fcc->shader->bt.const_base + dim);
tmp = tdst(TOY_FILE_VRF, tc_alloc_vrf(tc, param_size * 4), 0);
inst = tc_SEND(tc, tmp, tsrc_from(offset), desc, GEN6_SFID_SAMPLER);
msg_len = 1;
desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false,
- msg_type, msg_ctrl, ILO_WM_CONST_SURFACE(dim));
+ msg_type, msg_ctrl, fcc->shader->bt.const_base + dim);
tmp = tc_alloc_tmp(tc);
GEN6_MSG_SAMPLER_SIMD4X2,
GEN6_MSG_SAMPLER_LD,
0,
- ILO_WM_CONST_SURFACE(dim));
+ fcc->shader->bt.const_base + dim);
tmp = tc_alloc_tmp(tc);
inst = tc_SEND(tc, tmp, tsrc_from(offset), desc, GEN6_SFID_SAMPLER);
* Set up message registers and return the message descriptor for sampling.
*/
static struct toy_src
-fs_prepare_tgsi_sampling(struct toy_compiler *tc, const struct toy_inst *inst,
+fs_prepare_tgsi_sampling(struct fs_compile_context *fcc,
+ const struct toy_inst *inst,
int base_mrf, const uint32_t *saturate_coords,
unsigned *ret_sampler_index)
{
+ struct toy_compiler *tc = &fcc->tc;
unsigned simd_mode, msg_type, msg_len, sampler_index, binding_table_index;
struct toy_src coords[4], ddx[4], ddy[4], bias_or_lod, ref_or_si;
int num_coords, ref_pos, num_derivs;
assert(inst->src[sampler_src].file == TOY_FILE_IMM);
sampler_index = inst->src[sampler_src].val32;
- binding_table_index = ILO_WM_TEXTURE_SURFACE(sampler_index);
+ binding_table_index = fcc->shader->bt.tex_base + sampler_index;
/*
* From the Sandy Bridge PRM, volume 4 part 1, page 18:
int swizzles[4], i;
bool need_filter;
- desc = fs_prepare_tgsi_sampling(tc, inst,
+ desc = fs_prepare_tgsi_sampling(fcc, inst,
fcc->first_free_mrf,
fcc->variant->saturate_tex_coords,
&sampler_index);
mrf - fcc->first_free_mrf, 0,
header_present, false,
GEN6_MSG_DP_RT_WRITE,
- ctrl, ILO_WM_DRAW_SURFACE(cbuf));
+ ctrl, fcc->shader->bt.rt_base + cbuf);
tc_add2(tc, TOY_OPCODE_FB_WRITE, tdst_null(),
tsrc(TOY_FILE_MRF, fcc->first_free_mrf, 0), desc);
fcc->shader->dispatch_16 =
(fcc->dispatch_mode == GEN6_WM_DW5_16_PIXEL_DISPATCH);
+ fcc->shader->bt.rt_base = 0;
+ fcc->shader->bt.rt_count = fcc->variant->u.fs.num_cbufs;
+ /* to send EOT */
+ if (!fcc->shader->bt.rt_count)
+ fcc->shader->bt.rt_count = 1;
+
+ fcc->shader->bt.tex_base = fcc->shader->bt.rt_base +
+ fcc->shader->bt.rt_count;
+ fcc->shader->bt.tex_count = fcc->variant->num_sampler_views;
+
+ fcc->shader->bt.const_base = fcc->shader->bt.tex_base +
+ fcc->shader->bt.tex_count;
+ fcc->shader->bt.const_count = state->info.constant_buffer_count;
+
+ fcc->shader->bt.total_count = fcc->shader->bt.const_base +
+ fcc->shader->bt.const_count;
+
return true;
}
msg_len = 2;
desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false,
- msg_type, msg_ctrl, ILO_VS_CONST_SURFACE(dim));
+ msg_type, msg_ctrl, vcc->shader->bt.const_base + dim);
tc_SEND(tc, dst, tsrc_from(header), desc, vcc->const_cache);
}
GEN6_MSG_SAMPLER_SIMD4X2,
GEN6_MSG_SAMPLER_LD,
0,
- ILO_VS_CONST_SURFACE(dim));
+ vcc->shader->bt.const_base + dim);
tc_SEND(tc, dst, tsrc_from(offset), desc, GEN6_SFID_SAMPLER);
}
* Set up message registers and return the message descriptor for sampling.
*/
static struct toy_src
-vs_prepare_tgsi_sampling(struct toy_compiler *tc, const struct toy_inst *inst,
+vs_prepare_tgsi_sampling(struct vs_compile_context *vcc,
+ const struct toy_inst *inst,
int base_mrf, unsigned *ret_sampler_index)
{
+ struct toy_compiler *tc = &vcc->tc;
unsigned simd_mode, msg_type, msg_len, sampler_index, binding_table_index;
struct toy_src coords, ddx, ddy, bias_or_lod, ref_or_si;
int num_coords, ref_pos, num_derivs;
assert(inst->src[sampler_src].file == TOY_FILE_IMM);
sampler_index = inst->src[sampler_src].val32;
- binding_table_index = ILO_VS_TEXTURE_SURFACE(sampler_index);
+ binding_table_index = vcc->shader->bt.tex_base + sampler_index;
/*
* From the Sandy Bridge PRM, volume 4 part 1, page 18:
unsigned swizzle_zero_mask, swizzle_one_mask, swizzle_normal_mask;
bool need_filter;
- desc = vs_prepare_tgsi_sampling(tc, inst,
+ desc = vs_prepare_tgsi_sampling(vcc, inst,
vcc->first_free_mrf, &sampler_index);
switch (inst->opcode) {
vcc->shader->pcb.clip_state_size =
vcc->variant->u.vs.num_ucps * (sizeof(float) * 4);
+ vcc->shader->bt.tex_base = 0;
+ vcc->shader->bt.tex_count = vcc->variant->num_sampler_views;
+
+ vcc->shader->bt.const_base = vcc->shader->bt.tex_base +
+ vcc->shader->bt.tex_count;
+ vcc->shader->bt.const_count = state->info.constant_buffer_count;
+
+ vcc->shader->bt.total_count = vcc->shader->bt.const_base +
+ vcc->shader->bt.const_count;
+
return true;
}
projects / mesa.git / commitdiff