Fixes and error check
authorMiodrag Milanovic <mmicko@gmail.com>
Wed, 9 Mar 2022 08:48:29 +0000 (09:48 +0100)
committerMiodrag Milanovic <mmicko@gmail.com>
Wed, 9 Mar 2022 08:48:29 +0000 (09:48 +0100)
passes/sat/sim.cc

index d7f4de507fe9958ad8fac9bef50e9c2771232e7d..79140e61538b2c093de2ae870f8c2739e4b999a7 100644 (file)
@@ -1095,6 +1095,8 @@ struct SimWorker : SimShared
        void run_cosim_aiger_witness(Module *topmod)
        {
                log_assert(top == nullptr);
+               if ((clock.size()+clockn.size())==0)
+                       log_error("Clock signal must be specified.\n");
                std::ifstream mf(map_filename);
                std::string type, symbol;
                int variable, index;
@@ -1213,6 +1215,8 @@ struct SimWorker : SimShared
        void run_cosim_btor2_witness(Module *topmod)
        {
                log_assert(top == nullptr);
+               if ((clock.size()+clockn.size())==0)
+                       log_error("Clock signal must be specified.\n");
                std::ifstream f;
                f.open(sim_filename.c_str());
                if (f.fail() || GetSize(sim_filename) == 0)
@@ -1278,7 +1282,7 @@ struct SimWorker : SimShared
                                        if ((int)parts[1].size() != w->width)
                                                log_error("Size of wire %s is different than provided data.\n", log_signal(w));
                                        
-                                       top->set_state(w, Const(parts[1]));                                     
+                                       top->set_state(w, Const::from_string(parts[1]));
                                        break;
                        }
                }