[xcc,sim,opcodes] removed mtflh/mffl/mffh
authorAndrew Waterman <waterman@s144.Millennium.Berkeley.EDU>
Tue, 15 Feb 2011 05:17:49 +0000 (21:17 -0800)
committerAndrew Waterman <waterman@s144.Millennium.Berkeley.EDU>
Tue, 15 Feb 2011 10:37:18 +0000 (02:37 -0800)
in rv32 these will be replaced with loads and stores.

riscv/execute.h
riscv/insns/mffh_d.h [deleted file]
riscv/insns/mffl_d.h [deleted file]
riscv/insns/mtflh_d.h [deleted file]

index 48f6d34373e54318390ac58173d9c72d3a10662e..f78375a16e9702dda525ed8ff4addba143b1b676 100644 (file)
@@ -898,16 +898,6 @@ switch((insn.bits >> 0x0) & 0x7f)
           #include "insns/fcvt_d_s.h"
           break;
         }
-        if((insn.bits & 0x7c1ffff) == 0x19ed3)
-        {
-          #include "insns/mffl_d.h"
-          break;
-        }
-        if((insn.bits & 0x7c1ffff) == 0x1aed3)
-        {
-          #include "insns/mffh_d.h"
-          break;
-        }
         if((insn.bits & 0x3fffff) == 0x1ced3)
         {
           #include "insns/mtf_d.h"
@@ -923,11 +913,6 @@ switch((insn.bits >> 0x0) & 0x7f)
           #include "insns/fc_lt_d.h"
           break;
         }
-        if((insn.bits & 0x1ffff) == 0x1eed3)
-        {
-          #include "insns/mtflh_d.h"
-          break;
-        }
         if((insn.bits & 0x1ffff) == 0x15ed3)
         {
           #include "insns/fc_eq_d.h"
diff --git a/riscv/insns/mffh_d.h b/riscv/insns/mffh_d.h
deleted file mode 100644 (file)
index 02a94fa..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-require_xpr32;
-require_fp;
-RD = sext32(FRS2 >> 32);
diff --git a/riscv/insns/mffl_d.h b/riscv/insns/mffl_d.h
deleted file mode 100644 (file)
index 55e99fc..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-require_xpr32;
-require_fp;
-RD = sext32(FRS2);
diff --git a/riscv/insns/mtflh_d.h b/riscv/insns/mtflh_d.h
deleted file mode 100644 (file)
index ac87afb..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-require_xpr32;
-require_fp;
-FRD = (RS1 & 0x00000000FFFFFFFF) | (RS2 << 32);