$(top_builddir)/src/gtest/libgtest.la \
compiler/libintel_compiler.la \
common/libintel_common.la \
+ dev/libintel_dev.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(top_builddir)/src/intel/isl/libisl.la \
'test_@0@.cpp'.format(t),
include_directories : [inc_common, inc_intel],
link_with : [
- libintel_compiler, libintel_common, libmesa_util, libisl,
+ libintel_compiler, libintel_common, libintel_dev, libmesa_util, libisl,
],
dependencies : [dep_thread, dep_dl, idep_gtest, idep_nir],
)
#include "brw_eu.h"
#include "util/ralloc.h"
-enum subgen {
- IS_G45 = 1,
- IS_BYT,
- IS_HSW,
- IS_CHV,
- IS_BXT,
- IS_KBL,
- IS_GLK,
- IS_CFL,
-};
-
static const struct gen_info {
const char *name;
- int gen;
- enum subgen subgen;
} gens[] = {
- { "brw", 4 },
- { "g45", 4, IS_G45 },
- { "ilk", 5 },
- { "snb", 6 },
- { "ivb", 7 },
- { "byt", 7, IS_BYT },
- { "hsw", 7, IS_HSW },
- { "bdw", 8 },
- { "chv", 8, IS_CHV },
- { "skl", 9 },
- { "bxt", 9, IS_BXT },
- { "kbl", 9, IS_KBL },
- { "glk", 9, IS_GLK },
- { "cfl", 9, IS_CFL },
- { "cnl", 10 },
- { "icl", 11 },
+ { "brw", },
+ { "g4x", },
+ { "ilk", },
+ { "snb", },
+ { "ivb", },
+ { "byt", },
+ { "hsw", },
+ { "bdw", },
+ { "chv", },
+ { "skl", },
+ { "bxt", },
+ { "kbl", },
+ { "glk", },
+ { "cfl", },
+ { "cnl", },
};
class validation_test: public ::testing::TestWithParam<struct gen_info> {
void validation_test::SetUp()
{
struct gen_info info = GetParam();
+ int devid = gen_device_name_to_pci_device_id(info.name);
- devinfo.gen = info.gen;
- devinfo.is_g4x = info.subgen == IS_G45;
- devinfo.is_baytrail = info.subgen == IS_BYT;
- devinfo.is_haswell = info.subgen == IS_HSW;
- devinfo.is_cherryview = info.subgen == IS_CHV;
- devinfo.is_broxton = info.subgen == IS_BXT;
- devinfo.is_kabylake = info.subgen == IS_KBL;
- devinfo.is_geminilake = info.subgen == IS_GLK;
- devinfo.is_coffeelake = info.subgen == IS_CFL;
+ gen_get_device_info(devid, &devinfo);
brw_init_codegen(&devinfo, p, p);
}