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Added english language description, spaces and brackets for lhax instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:27:04 +0000
(11:27 +0100)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:27:04 +0000
(11:27 +0100)
openpower/isa/fixedload.mdwn
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diff --git
a/openpower/isa/fixedload.mdwn
b/openpower/isa/fixedload.mdwn
index 14d728400ef87abd50d7a4ae5bf1569c716bbcb9..976f899ab4950e1bc10dcd4dbac14278d133142b 100644
(file)
--- a/
openpower/isa/fixedload.mdwn
+++ b/
openpower/isa/fixedload.mdwn
@@
-253,6
+253,13
@@
Pseudo-code:
EA <- b + (RB)
RT <- EXTS(MEM(EA, 2))
+Description:
+
+ Let the effective address (EA) be the sum
+ (RA|0)+ (RB). The halfword in storage addressed by
+ EA is loaded into RT[48:63] . RT[0:47] are filled with a copy
+ of bit 0 of the loaded halfword.
+
Special Registers Altered:
None